PIC16F688
TABLE 8-2: SUMMARY OF ASSOCIATED ADC REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
ADCON0 ADFM VCFG
—
CHS2 CHS1 CHS0 GO/DONE ADON 00-0 0000 00-0 0000
ADCON1
—
ADCS2 ADCS1 ADCS0
—
—
—
—
-000 ---- -000 ----
ANSEL
ANS7 ANS6 ANS5 ANS4 ANS3 ANS2
ANS1
ANS0 1111 1111 1111 1111
ADRESH A/D Result Register High Byte
xxxx xxxx uuuu uuuu
ADRESL A/D Result Register Low Byte
xxxx xxxx uuuu uuuu
INTCON
GIE
PEIE
T0IE
INTE
RAIE
T0IF
INTF
RAIF 0000 000x 0000 000x
PIE1
EEIE
ADIE
RCIE
C2IE
C1IE OSFIE
TXIE TMR1IE 0000 0000 0000 0000
PIR1
EEIF
ADIF
RCIF
C2IF
C1IF OSFIF
TXIF TMR1IF 0000 0000 0000 0000
PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0 --x0 x000 --x0 x000
PORTC
—
—
RC5
RC4
RC3
RC2
RC1
RC0 --xx 0000 --xx 0000
TRISA
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
TRISC
—
—
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 --11 1111 --11 1111
Legend: x = unknown, u = unchanged, — = unimplemented read as ‘0’. Shaded cells are not used for ADC module.
© 2007 Microchip Technology Inc.
DS41203D-page 75