PIC16F723AT-I/SP View Datasheet(PDF) - Microchip Technology
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Description
Manufacturer
PIC16F723AT-I/SP Datasheet PDF : 284 Pages
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PIC16F/LF722A/723A
TABLE 23-3: CLKOUT AND I/O TIMING PARAMETERS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param
No.
Sym.
Characteristic
Min.
Typ†
OS11 TosH2ckL Fosc to CLKOUT (1)
—
—
OS12 TosH2ckH Fosc to CLKOUT (1)
—
—
OS13 TckL2ioV CLKOUT to Port out valid(1)
—
—
OS14 TioV2ckH Port input valid before CLKOUT(1)
TOSC + 200 ns —
OS15 TosH2ioV Fosc (Q1 cycle) to Port out valid
—
50
OS16 TosH2ioI Fosc (Q2 cycle) to Port input invalid
(I/O in hold time)
50
—
OS17
OS18
TioV2osH Port input valid to Fosc(Q2 cycle)
(I/O in setup time)
TioR
Port output rise time(2)
OS19 TioF
Port output fall time(2)
20
—
—
40
—
15
—
28
—
15
OS20* Tinp
INT pin input high or low time
25
—
OS21* Trbp
PORTB interrupt-on-change new input
TCY
—
level time
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25C unless otherwise stated.
Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC.
2: Includes OSC2 in CLKOUT mode.
Max.
70
72
20
—
70*
—
—
72
32
55
30
—
—
Units Conditions
ns VDD = 3.3-5.0V
ns VDD = 3.3-5.0V
ns
ns
ns VDD = 3.3-5.0V
ns VDD = 3.3-5.0V
ns
ns VDD = 2.0V
VDD = 3.3-5.0V
ns VDD = 2.0V
VDD = 3.3-5.0V
ns
ns
FIGURE 23-8:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Start-Up Time
Internal Reset(1)
Watchdog Timer
Reset(1)
33
32
I/O pins
Note 1: Asserted low.
30
31
34
34
DS41417A-page 214
2010 Microchip Technology Inc.
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