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PIC16LF777T-I/SP View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16LF777T-I/SP Datasheet PDF : 276 Pages
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PIC16F7X7
FIGURE 18-18: AUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
121
121
120
122
Note: Refer to Figure 18-4 for load conditions.
TABLE 18-13: AUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min Typ† Max Units Conditions
120 TCKH2DTV SYNC XMIT (MASTER & SLAVE)
Clock High to Data Out Valid
PIC16F7X7
— 80 ns
PIC16LF7X7 — — 100 ns
121 TCKRF
Clock Out Rise Time and Fall Time PIC16F7X7
(Master mode)
PIC16LF7X7 —
— 45 ns
— 50 ns
122 TDTRF Data Out Rise Time and Fall Time PIC16F7X7
— 45 ns
PIC16LF7X7 — — 50 ns
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 18-19: AUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 18-4 for load conditions.
TABLE 18-14: AUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Param
No.
Symbol
Characteristic
Min Typ† Max Units Conditions
125 TDTV2CKL SYNC RCV (MASTER & SLAVE)
Data Setup before CK (DT setup time) 15
ns
126 TCKL2DTL Data Hold after CK (DT hold time)
15
ns
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
DS30498C-page 234
2004 Microchip Technology Inc.

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