PIC16F87T/ML View Datasheet(PDF) - Microchip Technology
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Description
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PIC16F87T/ML Datasheet PDF : 230 Pages
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PIC16F87/88
TABLE 18-8: SPI MODE REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ† Max Units Conditions
70*
TssL2scH, SS to SCK or SCK Input
TssL2scL
TCY
— — ns
71*
TscH
SCK Input High Time (Slave mode)
TCY + 20
— — ns
72*
TscL
SCK Input Low Time (Slave mode)
TCY + 20
— — ns
73*
TdiV2scH, Setup Time of SDI Data Input to SCK Edge
TdiV2scL
100
— — ns
74*
TscH2diL, Hold Time of SDI Data Input to SCK Edge
TscL2diL
100
— — ns
75*
TdoR
SDO Data Output Rise Time
PIC16F87/88
PIC16LF87/88
—
10 25 ns
—
25 50 ns
76*
TdoF
SDO Data Output Fall Time
—
10 25 ns
77*
TssH2doZ SS to SDO Output High-Impedance
10
— 50 ns
78*
TscR
SCK Output Rise Time
(Master mode)
PIC16F87/88
PIC16LF87/88
—
10 25 ns
—
25 50 ns
79*
TscF
SCK Output Fall Time (Master mode)
—
10 25 ns
80*
TscH2doV, SDO Data Output Valid after SCK PIC16F87/88
TscL2doV Edge
PIC16LF87/88
—
— 50 ns
—
— 145 ns
81*
TdoV2scH, SDO Data Output Setup to SCK Edge
TdoV2scL
TCY
— — ns
82*
TssL2doV SDO Data Output Valid after SS Edge
—
— 50 ns
83*
TscH2ssH, SS after SCK Edge
TscL2ssH
1.5 TCY + 40 — — ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
FIGURE 18-14: I2C™ BUS START/STOP BITS TIMING
SCL
SDA
91
90
93
92
Start
Condition
Note: Refer to Figure 18-3 for load conditions.
Stop
Condition
DS30487D-page 184
2002-2013 Microchip Technology Inc.
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