PIC16F87T/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F87T/ML

18/20/28-Pin Enhanced Flash MCUs with nanoWatt Technology

Microchip Technology 

PIC16F87/88

FIGURE 18-16: AUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING

RB5/SS/TX/CK

pin

RB2/SDO/RX/DT

pin

121

121

120

122

Note: Refer to Figure 18-3 for load conditions.

TABLE 18-11: AUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS

Param

No.

Sym

Characteristic

Min Typ† Max Units Conditions

120

TckH2dtV SYNC XMIT (MASTER &

PIC16F87/88

SLAVE)

Clock High to Data Out Valid PIC16LF87/88

—

— 80 ns

—

— 100 ns

121

Tckrf

Clock Out Rise Time and Fall PIC16F87/88

Time (Master mode)

PIC16LF87/88

—

— 45 ns

—

— 50 ns

122

Tdtrf

Data Out Rise Time and Fall

Time

PIC16F87/88

PIC16LF87/88

—

— 45 ns

—

— 50 ns

† Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not

tested.

FIGURE 18-17: AUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING

RB5/SS/TX/CK

pin

RB2/SDO/RX/DT

pin

125

126

Note: Refer to Figure 18-3 for load conditions.

TABLE 18-12: AUSART SYNCHRONOUS RECEIVE REQUIREMENTS

Param

No.

Sym

Characteristic

Min Typ† Max Units Conditions

125

TdtV2ckL SYNC RCV (MASTER & SLAVE)

Data Setup before CK  (DT setup time) 15

—

—

ns

126

TckL2dtl Data Hold after CK  (DT hold time)

15

—

—

ns

† Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance

only and are not tested.

 2002-2013 Microchip Technology Inc.

DS30487D-page 187

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