PIC16F1512T-E/SO View Datasheet(PDF) - Microchip Technology
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PIC16F1512T-E/SO Datasheet PDF : 360 Pages
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PIC16(L)F1512/3
21.2.5 COMPARE DURING SLEEP
The Compare mode is dependent upon the system
clock (FOSC) for proper operation. Since FOSC is shut
down during Sleep mode, the Compare mode will not
function properly during Sleep.
21.2.6 ALTERNATE PIN LOCATIONS
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see Section 12.1 “Alternate Pin Function”for
more information.
21.3 PWM Overview
Pulse-Width Modulation (PWM) is a scheme that
provides power to a load by switching quickly between
fully on and fully off states. The PWM signal resembles
a square wave where the high portion of the signal is
considered the on state and the low portion of the signal
is considered the off state. The high portion, also known
as the pulse width, can vary in time and is defined in
steps. A larger number of steps applied, which
lengthens the pulse width, also supplies more power to
the load. Lowering the number of steps applied, which
shortens the pulse width, supplies less power. The
PWM period is defined as the duration of one complete
cycle or the total amount of on and off time combined.
PWM resolution defines the maximum number of steps
that can be present in a single PWM period. A higher
resolution allows for more precise control of the pulse
width time and in turn the power that is applied to the
load.
The term duty cycle describes the proportion of the on
time to the off time and is expressed in percentages,
where 0% is fully off and 100% is fully on. A lower duty
cycle corresponds to less power applied and a higher
duty cycle corresponds to more power applied.
Figure 21-3 shows a typical waveform of the PWM
signal.
21.3.1 STANDARD PWM OPERATION
The standard PWM function described in this section is
available and identical for all CCP modules.
The standard PWM mode generates a Pulse-Width
Modulation (PWM) signal on the CCPx pin with up to 10
bits of resolution. The period, duty cycle, and resolution
are controlled by the following registers:
• PR2 registers
• T2CON registers
• CCPRxL registers
• CCPxCON registers
Figure 21-4 shows a simplified block diagram of PWM
operation.
Note 1: The corresponding TRIS bit must be
cleared to enable the PWM output on the
CCPx pin.
2: Clearing the CCPxCON register will
relinquish control of the CCPx pin.
FIGURE 21-3: CCP PWM OUTPUT SIGNAL
Period
Pulse Width
TMR2 = 0
TMR2 = PR2
TMR2 = CCPRxH:CCPxCON<5:4>
FIGURE 21-4:
SIMPLIFIED PWM BLOCK
DIAGRAM
Duty Cycle Registers
CCPRxL
CCPxCON<5:4>
CCPRxH(2) (Slave)
Comparator
RQ
CCPx
TMR2
(1)
S
TRIS
Comparator
PR2
Clear Timer,
toggle CCPx pin and
latch duty cycle
Note 1:
2:
The 8-bit timer TMR2 register is concatenated
with the 2-bit internal system clock (FOSC), or
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPRxH is a read-only register.
DS40001624C-page 232
2012-2014 Microchip Technology Inc.
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