PIC16F1512T-E/SO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F1512T-E/SO Datasheet PDF : 360 Pages
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PIC16(L)F1512/3
21.3.7 OPERATION IN SLEEP MODE
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
21.3.8 CHANGES IN SYSTEM CLOCK
FREQUENCY
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 5.0 “Oscillator Module (With Fail-Safe
Clock Monitor)” for additional details.
21.3.9 EFFECTS OF RESET
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
21.3.10 ALTERNATE PIN LOCATIONS
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see Section 12.1 “Alternate Pin Function” for
more information.
TABLE 21-3: SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
APFCON
—
—
—
—
—
—
SSSEL CCP2SEL
CCP1CON
—
—
DC1B<1:0>
CCP1M<3:0>
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
PIE1
TMR1GIE ADIE
RCIE
TXIE
SSPIE
CCP1IE TMR2IE TMR1IE
PIE2
OSFIE
—
—
—
BCLIE
—
—
CCP2IE
PIR1
TMR1GIF ADIF
RCIF
TXIF
SSPIF
CCP1IF TMR2IF TMR1IF
PIR2
OSFIF
—
—
—
BCLIF
—
—
CCP2IF
PR2
T2CON
Timer2 Period Register
—
T2OUTPS<3:0>
TMR2ON
T2CKPS<1:0>
TMR2
Timer2 Module Register
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
* Page provides register information.
TRISA1
TRISA0
101
236
69
70
71
72
73
171*
173
171
103
2012-2014 Microchip Technology Inc.
DS40001624C-page 235
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