PIC16F1512T-E/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F1512T-E/SO

28-Pin Flash Microcontrollers with XLP Technology

Microchip Technology 

PIC16(L)F1512/3

FIGURE 22-12: SYNCHRONOUS RECEPTION (MASTER MODE, SREN)

RX/DT

pin

TX/CK pin

(SCKP = 0)

bit 0

bit 1

bit 2

bit 3

bit 4

bit 5

bit 6

bit 7

TX/CK pin

(SCKP = 1)

Write to

bit SREN

SREN bit

CREN bit ‘0’

‘0’

RCIF bit

(Interrupt)

Read

RCREG

Note:

Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.

TABLE 22-8: SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER

RECEPTION

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register

on Page

BAUDCON ABDOVF RCIDL

—

SCKP BRG16

—

WUE ABDEN

INTCON

GIE

PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF

PIE1

TMR1GIE ADIE

RCIE

TXIE SSPIE CCP1IE TMR2IE TMR1IE

PIR1

TMR1GIF ADIF

RCIF

TXIF SSPIF CCP1IF TMR2IF TMR1IF

RCREG

EUSART Receive Data Register

RCSTA

SPEN

RX9

SREN CREN ADDEN FERR OERR RX9D

SPBRGL

BRG<7:0>

SPBRGH

BRG<15:8>

TRISC

TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0

TXSTA

CSRC

TX9

TXEN SYNC SENDB BRGH TRMT TX9D

Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master reception.

* Page provides register information.

249

69

70

72

242*

248

250*

250*

110

247

DS40001624C-page 262

 2012-2014 Microchip Technology Inc.

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