PIC18LC858T-I/L View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LC858T-I/L

High-Performance Microcontrollers with CAN Module

Microchip Technology 

PIC18CXX8

15.3.6 SLEEP OPERATION

In Master mode, all module clocks are halted, and the

transmission/reception will remain in that state until the

device wakes from SLEEP. After the device returns to

normal mode, the module will continue to trans-

mit/receive data.

In Slave mode, the SPI transmit/receive shift register

operates asynchronously to the device. This allows the

device to be placed in SLEEP mode, and data to be

shifted into the SPI transmit/receive shift register.

When all eight bits have been received, the MSSP

interrupt flag bit will be set and, if enabled, will wake the

device from SLEEP.

15.3.7 EFFECTS OF A RESET

A RESET disables the MSSP module and terminates

the current transfer.

15.3.8 BUS MODE COMPATIBILITY

Table 15-1 shows the compatibility between the stan-

dard SPI modes and the states of the CKP and CKE

control bits.

TABLE 15-1: SPI BUS MODES

Standard SPI Mode

Terminology

Control Bits State

CKP

CKE

0, 0

0

1

0, 1

0

0

1, 0

1

1

1, 1

1

0

There is also a SMP bit that controls when the data will

be sampled.

TABLE 15-2: REGISTERS ASSOCIATED WITH SPI OPERATION

Name

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2

Bit 1

Bit 0

Value on

POR,

BOR

Value on

all other

RESETS

INTCON

GIE/

GIEH

PEIE/ TMR0IE INT0IE RBIE TMR0IF INT0IF

GIEL

RBIF 0000 000x 0000 000u

PIR1

PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000

PIE1

PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000

IPR1

TRISC

SSPBUF

SSPCON

TRISA

PSPIP ADIP RCIP TXIP SSPIP CCP1IP

PORTC Data Direction Register

Synchronous Serial Port Receive Buffer/Transmit Register

WCOL SSPOV SSPEN CKP SSPM3 SSPM2

— PORTA Data Direction Register(1)

TMR2IP TMR1IP 0000 0000 0000 0000

1111 1111 1111 1111

xxxx xxxx uuuu uuuu

SSPM1 SSPM0 0000 0000 0000 0000

--11 1111 --11 1111

SSPSTAT SMP CKE D/A

P

S

R/W

UA

BF 0000 0000 0000 0000

Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'.

Shaded cells are not used by the MSSP in SPI mode.

Note 1: Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other oscillator

modes, they are disabled and read ‘0’.

DS30475A-page 146

Advanced Information

 2000 Microchip Technology Inc.

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