PIC18CXX8
FIGURE 16-2: ASYNCHRONOUS TRANSMISSION
Write to TXREG
BRG Output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
register empty flag)
Word 1
START Bit
Bit 0
Bit 1
Word 1
TRMT bit
(Transmit shift
register empty flag)
Word 1
Transmit Shift Reg
Bit 7/8 STOP Bit
FIGURE 16-3: ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
Write to TXREG
BRG Output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
Word 1
Word 2
START Bit Bit 0
Bit 1
Word 1
Bit 7/8
STOP Bit START Bit
Word 2
Bit 0
TRMT bit
(Transmit shift
reg. empty flag)
Word 1
Transmit Shift Reg.
Note: This timing diagram shows two consecutive transmissions.
Word 2
Transmit Shift Reg.
TABLE 16-6: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
all other
RESETS
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
PIR1
PSPIF
ADIF
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
PSPIE
ADIE
RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
IPR1
PSPIP
ADIP
RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
RCSTA SPEN
RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00x
TXREG USART Transmit Register
0000 0000 0000 0000
TXSTA CSRC
TX9
TXEN SYNC ADDEN BRGH TRMT TX9D 0000 0010 0000 0010
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented locations read as '0'.
Shaded cells are not used for Asynchronous Transmission.
0000 0000 0000 0000
DS30475A-page 174
Advanced Information
2000 Microchip Technology Inc.