PIC18CXX8
17.2.5 CAN BAUD RATE REGISTERS
This subsection describes the CAN Baud Rate
registers.
REGISTER 17-29: BRGCON1 – BAUD RATE CONTROL REGISTER 1
R/W-0
R/W-0
R/W-0
R/W-0 R/W-0
SJW1
SJW0
BRP5
BRP4
BRP3
bit 7
R/W-0
BRP2
R/W-0
BRP1
R/W-0
BRP0
bit 0
bit 7-6
bit 5-0
SJW1:SJW0: Synchronized Jump Width bits
11 = Synchronization Jump Width Time = 4 x TQ
10 = Synchronization Jump Width Time = 3 x TQ
01 = Synchronization Jump Width Time = 2 x TQ
00 = Synchronization Jump Width Time = 1 x TQ
BRP5:BRP0: Baud Rate Prescaler bits
111111 = TQ = (2 x 64)/FOSC
111110 = TQ = (2 x 63)/FOSC
:
:
000001 = TQ = (2 x 2)/FOSC
000000 = TQ = (2 x 1)/FOSC
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
Note: This register is only accessible in Configuration mode.
DS30475A-page 202
Advanced Information
2000 Microchip Technology Inc.