PIC18F44J10T-I/ML(2009) View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F44J10T-I/ML
(Rev.:2009)

28/40/44-Pin High-Performance, RISC Microcontrollers

Microchip Technology 

PIC18F45J10 FAMILY

TABLE 1-2: PIC18F24J10/25J10 PINOUT I/O DESCRIPTIONS

Pin Number

Pin Name

SPDIP,

Pin Buffer

SOIC, QFN Type Type

SSOP

Description

MCLR

MCLR

1 26

Master Clear (input) or programming voltage (input).

I ST

Master Clear (Reset) input. This pin is an active-low

Reset to the device.

OSC1/CLKI

OSC1

CLKI

9

6

Oscillator crystal or external clock input.

I—

Oscillator crystal input or external clock source input.

I CMOS External clock source input. Always associated with pin

function OSC1. See related OSC2/CLKO pins.

OSC2/CLKO

OSC2

CLKO

10 7

Oscillator crystal or clock output.

O—

Oscillator crystal output. Connects to crystal or

resonator in Crystal Oscillator mode.

O—

In EC mode, OSC2 pin outputs CLKO which has 1/4 the

frequency of OSC1 and denotes the instruction cycle rate.

Legend: TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

O = Output

CMOS = CMOS compatible input or output

I

= Input

P

= Power

Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.

2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.

DS39682E-page 12

© 2009 Microchip Technology Inc.

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