PIC18F44J10T-I/ML(2009) View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F44J10T-I/ML
(Rev.:2009)

28/40/44-Pin High-Performance, RISC Microcontrollers

Microchip Technology 

PIC18F45J10 FAMILY

REGISTER 21-3: CONFIG2L: CONFIGURATION REGISTER 2 LOW (BYTE ADDRESS 300002h)

R/WO-1

R/WO-1

U-0

U-0

U-0

R/WO-1

R/WO-1

R/WO-1

IESO

FCMEN

—

—

—

FOSC2

FOSC1

FOSC0

bit 7

bit 0

Legend:

R = Readable bit

WO = Write Once bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as ‘0’

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

bit 6

bit 5-3

bit 2

bit 1-0

IESO: Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit

1 = Two-Speed Start-up enabled

0 = Two-Speed Start-up disabled

FCMEN: Fail-Safe Clock Monitor Enable bit

1 = Fail-Safe Clock Monitor enabled

0 = Fail-Safe Clock Monitor disabled

Unimplemented: Read as ‘0’

FOSC2: Default/Reset System Clock Select bit

1 = Clock selected by FOSC<1:0> as system clock is enabled when OSCCON<1:0> = 00

0 = INTRC enabled as system clock when OSCCON<1:0> = 00

FOSC<1:0>: Oscillator Selection bits

11 = EC oscillator, PLL enabled and under software control, CLKO function on OSC2

10 = EC oscillator, CLKO function on OSC2

01 = HS oscillator, PLL enabled and under software control

00 = HS oscillator

DS39682E-page 238

© 2009 Microchip Technology Inc.

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