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PIC18LF45J10T-I/SP View Datasheet(PDF) - Microchip Technology

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Description
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PIC18LF45J10T-I/SP Datasheet PDF : 358 Pages
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PIC18F45J10 FAMILY
FIGURE 23-6:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
Oscillator
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
I/O pins
Note: Refer to Figure 23-3 for load conditions.
30
31
34
34
FIGURE 23-7:
BROWN-OUT RESET TIMING
VDD
BVDD
VIRVST
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
VBGAP = 1.2V
TABLE 23-10: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Typ Max Units
Conditions
30
TMCL MCLR Pulse Width (low)
2
μs
31
TWDT Watchdog Timer Time-out Period
(no postscaler)
2.8
4.1
5.4
ms
32
TOST Oscillation Start-up Timer Period 1024 TOSC — 1024 TOSC — TOSC = OSC1 period
33
TPWRT Power-up Timer Period
46.2
66
85.8
ms
34
TIOZ I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
2
μs
38
TCSD CPU Start-up Time
200
μs
DS39682C-page 314
Preliminary
© 2007 Microchip Technology Inc.

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