PIC18F26K22T-I/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F26K22T-I/ML
Microchip Technology
PIC18F26K22T-I/ML Datasheet PDF : 494 Pages
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PIC18(L)F2X/4XK22
INDEX
A
A/D
Analog Port Pins, Configuring .................................. 306
Associated Registers ............................................... 306
Conversions ............................................................. 297
Converter Characteristics ........................................ 461
Discharge ................................................................. 298
Selecting and Configuring Acquisition Time ............ 294
Absolute Maximum Ratings ............................................. 423
AC (Timing) Characteristics ............................................. 443
Load Conditions for Device Timing Specifications ... 444
Parameter Symbology ............................................. 443
Temperature and Voltage Specifications ................. 444
Timing Conditions .................................................... 444
AC Characteristics
Internal RC Accuracy ............................................... 446
Access Bank
Mapping with Indexed Literal Offset Mode ................. 94
ACKSTAT ........................................................................ 244
ACKSTAT Status Flag ..................................................... 244
ADC ................................................................................. 293
Acquisition Requirements ........................................ 304
Block Diagram .......................................................... 293
Calculating Acquisition Time .................................... 304
Channel Selection .................................................... 294
Configuration ............................................................ 294
Conversion Clock ..................................................... 295
Conversion Procedure ............................................. 299
Internal Sampling Switch (RSS) IMPEDANCE ............. 304
Interrupts .................................................................. 295
Operation ................................................................. 297
Operation During Sleep ........................................... 298
Port Configuration .................................................... 294
Power Management ................................................. 298
Reference Voltage (VREF) ........................................ 294
Result Formatting ..................................................... 296
Source Impedance ................................................... 304
Special Event Trigger ............................................... 298
Starting an A/D Conversion ..................................... 296
ADCON0 Register ............................................................ 300
ADCON1 Register ............................................................ 301
ADCON2 Register ............................................................ 302
ADDFSR .......................................................................... 412
ADDLW ............................................................................ 375
ADDULNK ........................................................................ 412
ADDWF ............................................................................ 375
ADDWFC ......................................................................... 376
ADRESH Register (ADFM = 0) ........................................ 303
ADRESH Register (ADFM = 1) ........................................ 303
ADRESL Register (ADFM = 0) ......................................... 303
ADRESL Register (ADFM = 1) ......................................... 303
Analog Input Connection Considerations ......................... 314
Analog-to-Digital Converter. See ADC
ANDLW ............................................................................ 376
ANDWF ............................................................................ 377
Assembler
MPASM Assembler .................................................. 420
B
Bank Select Register (BSR) ............................................... 76
BAUDCON Register ......................................................... 276
BC .................................................................................... 377
BCF .................................................................................. 378
BF ............................................................................ 244, 246
BF Status Flag ......................................................... 244, 246
Block Diagrams
(CCP) Capture Mode Operation .............................. 180
ADC ......................................................................... 293
ADC Transfer Function ............................................ 305
Analog Input Model .......................................... 305, 314
CCP PWM ............................................................... 186
Comparator 1 ........................................................... 308
Compare .................................................................. 183
Crystal Operation ....................................................... 35
CTMU ...................................................................... 319
CTMU Current Source Calibration Circuit ............... 322
CTMU Typical Connections and Internal
Configuration for Pulse Delay Generation ....... 330
CTMU Typical Connections and Internal
Configuration for Time Measurement .............. 329
Digital-to-Analog Converter (DAC) .......................... 342
EUSART Receive .................................................... 266
EUSART Transmit ................................................... 265
External POR Circuit (Slow VDD Power-up) .............. 61
External RC Mode ..................................................... 36
Fail-Safe Clock Monitor (FSCM) ................................ 44
Generic I/O Port ....................................................... 133
High/Low-Voltage Detect with External Input .......... 346
Interrupt Logic .......................................................... 114
On-Chip Reset Circuit ................................................ 59
PIC18F46K22 ............................................................ 16
PWM (Enhanced) .................................................... 190
Reads from Flash Program Memory ......................... 99
Resonator Operation ................................................. 35
Table Read Operation ............................................... 95
Table Write Operation ............................................... 96
Table Writes to Flash Program Memory .................. 101
Timer0 in 16-Bit Mode ............................................. 161
Timer0 in 8-Bit Mode ............................................... 160
Timer1 ..................................................................... 163
Timer1 Gate ............................................. 169, 170, 171
Timer2/4/6 ............................................................... 175
Voltage Reference ................................................... 339
Voltage Reference Output Buffer Example ............. 342
Watchdog Timer ...................................................... 362
BN .................................................................................... 378
BNC ................................................................................. 379
BNN ................................................................................. 379
BNOV .............................................................................. 380
BNZ ................................................................................. 380
BOR. See Brown-out Reset.
BOV ................................................................................. 383
BRA ................................................................................. 381
Break Character (12-bit) Transmit and Receive .............. 284
Brown-out Reset (BOR) ..................................................... 62
Detecting ................................................................... 62
Disabling in Sleep Mode ............................................ 62
Minimum Enable Time ............................................... 62
Software Enabled ...................................................... 62
BSF .................................................................................. 381
BTFSC ............................................................................. 382
BTFSS ............................................................................. 382
BTG ................................................................................. 383
BZ .................................................................................... 384
2010 Microchip Technology Inc.
Preliminary
DS41412A-page 481
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