PIC18F44K22T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F44K22T-I/SO

28/40/44-Pin, Low-Power,High-Performance Microcontrollers with XLP Technology

Microchip Technology 

PIC18(L)F2X/4XK22

Synchronous Master Mode .............................. 285, 290

Associated Registers, Receive ........................ 289

Associated Registers, Transmit ............... 286, 291

Reception ......................................................... 288

Transmission .................................................... 285

Synchronous Slave Mode

Associated Registers, Receive ........................ 292

Reception ......................................................... 292

Transmission .................................................... 290

Extended Instruction Set

ADDFSR .................................................................. 412

ADDULNK ................................................................ 412

and Using MPLAB Tools .......................................... 418

CALLW ..................................................................... 413

Considerations for Use ............................................ 416

MOVSF .................................................................... 413

MOVSS .................................................................... 414

PUSHL ..................................................................... 414

SUBFSR .................................................................. 415

SUBULNK ................................................................ 415

Syntax ...................................................................... 411

F

Fail-Safe Clock Monitor .............................................. 44, 351

Fail-Safe Condition Clearing ...................................... 44

Fail-Safe Detection .................................................... 44

Fail-Safe Operation .................................................... 44

Reset or Wake-up from Sleep .................................... 44

Fast Register Stack ............................................................ 72

Fixed Voltage Reference (FVR)

Associated Registers ............................................... 340

Flash Program Memory ...................................................... 95

Associated Registers ............................................... 103

Control Registers ....................................................... 96

EECON1 and EECON2 ..................................... 96

TABLAT (Table Latch) Register ......................... 98

TBLPTR (Table Pointer) Register ...................... 98

Erase Sequence ...................................................... 100

Erasing ..................................................................... 100

Operation During Code-Protect ............................... 103

Reading ...................................................................... 99

Table Pointer

Boundaries Based on Operation ........................ 98

Table Pointer Boundaries .......................................... 98

Table Reads and Table Writes .................................. 95

Write Sequence ....................................................... 101

Writing To ................................................................. 101

Protection Against Spurious Writes ................. 103

Unexpected Termination .................................. 103

Write Verify ...................................................... 103

G

GOTO ............................................................................... 390

H

Hardware Multiplier .......................................................... 111

Introduction .............................................................. 111

Operation ................................................................. 111

Performance Comparison ........................................ 111

High/Low-Voltage Detect ................................................. 345

Applications .............................................................. 348

Associated Registers ............................................... 349

Characteristics ......................................................... 442

Current Consumption ............................................... 347

Effects of a Reset ..................................................... 349

Operation ................................................................. 346

During Sleep .................................................... 349

Setup ....................................................................... 347

Start-up Time ........................................................... 347

Typical Low-Voltage Detect Application .................. 348

HLVD. See High/Low-Voltage Detect. ............................. 345

I

I2C Mode (MSSPx)

Acknowledge Sequence Timing .............................. 248

Bus Collision

During a Repeated Start Condition .................. 253

During a Stop Condition .................................. 254

Effects of a Reset .................................................... 249

I2C Clock Rate w/BRG ............................................. 256

Master Mode

Operation ......................................................... 240

Reception ........................................................ 246

Start Condition Timing ............................. 242, 243

Transmission ................................................... 244

Multi-Master Communication, Bus Collision and

Arbitration ........................................................ 250

Multi-Master Mode ................................................... 249

Read/Write Bit Information (R/W Bit) ....................... 225

Slave Mode

Transmission ................................................... 230

Sleep Operation ....................................................... 249

Stop Condition Timing ............................................. 248

ID Locations ............................................................. 351, 367

INCF ................................................................................ 390

INCFSZ ............................................................................ 391

In-Circuit Debugger .......................................................... 367

In-Circuit Serial Programming (ICSP) ...................... 351, 367

Indexed Literal Offset Addressing

and Standard PIC18 Instructions ............................. 416

Indexed Literal Offset Mode ............................................. 416

Indirect Addressing ............................................................ 91

INFSNZ ............................................................................ 391

Instruction Cycle ................................................................ 74

Clocking Scheme ....................................................... 74

Instruction Flow/Pipelining ................................................. 74

Instruction Set .................................................................. 369

ADDLW .................................................................... 375

ADDWF .................................................................... 375

ADDWF (Indexed Literal Offset Mode) .................... 417

ADDWFC ................................................................. 376

ANDLW .................................................................... 376

ANDWF .................................................................... 377

BC ............................................................................ 377

BCF ......................................................................... 378

BN ............................................................................ 378

BNC ......................................................................... 379

BNN ......................................................................... 379

BNOV ...................................................................... 380

BNZ ......................................................................... 380

BOV ......................................................................... 383

BRA ......................................................................... 381

BSF .......................................................................... 381

BSF (Indexed Literal Offset Mode) .......................... 417

BTFSC ..................................................................... 382

BTFSS ..................................................................... 382

BTG ......................................................................... 383

BZ ............................................................................ 384

CALL ........................................................................ 384

CLRF ....................................................................... 385

CLRWDT ................................................................. 385

COMF ...................................................................... 386

DS41412A-page 484

Preliminary

 2010 Microchip Technology Inc.

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