DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

PIC18F44K22T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC18F44K22T-I/SO Datasheet PDF : 494 Pages
First Prev 481 482 483 484 485 486 487 488 489 490 Next Last
PIC18(L)F2X/4XK22
DEVID2 (Device ID 2) .............................................. 360
ECCPxAS (CCPx Auto-Shutdown Control) ............. 207
EECON1 (Data EEPROM Control 1) ................. 97, 106
HLVDCON (High/Low-Voltage Detect Control) ........ 345
INTCON (Interrupt Control) ...................................... 115
INTCON2 (Interrupt Control 2) ................................. 116
INTCON3 (Interrupt Control 3) ................................. 117
IPR1 (Peripheral Interrupt Priority 1) ........................ 127
IPR2 (Peripheral Interrupt Priority 2) ........................ 128
IPR3 (Peripheral Interrupt Priority) ........................... 129
IPR4 (Peripheral Interrupt Priority) ........................... 130
IPR5 (Peripheral Interrupt Priority) ........................... 130
OSCCON (Oscillator Control) .............................. 32, 33
OSCTUNE (Oscillator Tuning) ................................... 37
PIE1 (Peripheral Interrupt Enable 1) ........................ 123
PIE2 (Peripheral Interrupt Enable 2) ........................ 124
PIE3 (Peripheral Interrupt Enable] ........................... 125
PIE4 (Peripheral Interrupt Enable) ........................... 126
PIE5 (Peripheral Interrupt Enable) ........................... 126
PIR1 (Peripheral Interrupt Request 1) ..................... 118
PIR2 (Peripheral Interrupt Request 2) ..................... 119
PSTRxCON (PWM Steering Control) ...................... 208
PWMxCON (Enhanced PWM Control) .................... 208
RCON (Reset Control) ....................................... 60, 130
RCSTA (Receive Status and Control) ...................... 275
SLRCON (PORT Slew Rate Control) ....................... 157
SRCON0 (SR Latch Control 0) ................................ 337
SRCON1 (SR Latch Control 1) ................................ 338
SSPxADD (MSSPx Address and Baud Rate,
I2C Mode) ........................................................ 263
SSPxCON1 (MSSPx Control 1) ............................... 258
SSPxCON2 (SSPx Control 2) .................................. 260
SSPxMSK (SSPx Mask) .......................................... 262
SSPxSTAT (SSPx Status) ....................................... 257
STATUS ..................................................................... 89
STKPTR (Stack Pointer) ............................................ 72
T0CON (Timer0 Control) .......................................... 159
T1CON (Timer1 Control) .......................................... 172
T1GCON (Timer1 Gate Control) .............................. 173
TXCON .................................................................... 177
TXSTA (Transmit Status and Control) ..................... 274
VREFCON0 ............................................................. 340
VREFCON1 ............................................................. 343
VREFCON2 ............................................................. 344
WDTCON (Watchdog Timer Control) ...................... 363
RESET ............................................................................. 399
Reset State of Registers .................................................... 67
Resets .............................................................................. 351
Brown-out Reset (BOR) ........................................... 351
Oscillator Start-up Timer (OST) ............................... 351
Power-on Reset (POR) ............................................ 351
Power-up Timer (PWRT) ......................................... 351
RETFIE ............................................................................ 400
RETLW ............................................................................ 400
RETURN .......................................................................... 401
Return Address Stack ........................................................ 70
Return Stack Pointer (STKPTR) ........................................ 71
Revision History ............................................................... 479
RLCF ................................................................................ 401
RLNCF ............................................................................. 402
RRCF ............................................................................... 402
RRNCF ............................................................................ 403
S
SEC_IDLE Mode ................................................................ 52
SEC_RUN Mode ................................................................ 48
SETF ............................................................................... 403
Shoot-through Current ..................................................... 199
Single-Supply ICSP Programming.
SLEEP ............................................................................. 404
Sleep
OSC1 and OSC2 Pin States ...................................... 41
Sleep Mode ....................................................................... 51
Slew Rate ........................................................................ 152
SLRCON Register ........................................................... 157
Software Simulator (MPLAB SIM) ................................... 421
SPBRG ............................................................................ 277
SPBRGH ......................................................................... 277
Special Event Trigger ...................................................... 298
Special Function Registers ................................................ 82
Map ............................................................................ 83
SPI Mode (MSSPx)
Associated Registers ............................................... 219
SPI Clock ................................................................. 215
SR Latch
Associated Registers ............................................... 338
Effects of a Reset .................................................... 335
SRCON0 Register ........................................................... 337
SRCON1 Register ........................................................... 338
SSPxADD Register .......................................................... 263
SSPxCON1 Register ....................................................... 258
SSPxCON2 Register ....................................................... 260
SSPxMSK Register .......................................................... 262
SSPxOV .......................................................................... 246
SSPxOV Status Flag ....................................................... 246
SSPxSTAT Register ........................................................ 257
R/W Bit .................................................................... 225
Stack Full/Underflow Resets .............................................. 72
Standard Instructions ....................................................... 369
STATUS Register .............................................................. 89
STKPTR Register .............................................................. 72
SUBFSR .......................................................................... 415
SUBFWB ......................................................................... 404
SUBLW ............................................................................ 405
SUBULNK ........................................................................ 415
SUBWF ............................................................................ 405
SUBWFB ......................................................................... 406
SWAPF ............................................................................ 406
T
T0CON Register .............................................................. 159
T1CON Register .............................................................. 172
T1GCON Register ........................................................... 173
Table Pointer Operations (table) ........................................ 98
Table Reads/Table Writes ................................................. 73
TBLRD ............................................................................. 407
TBLWT ............................................................................ 408
Time-out in Various Situations (table) ................................ 64
Timer0 ............................................................................. 159
Associated Registers ............................................... 161
Operation ................................................................. 160
Overflow Interrupt .................................................... 161
Prescaler ................................................................. 161
Prescaler Assignment (PSA Bit) .............................. 161
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 161
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 160
Source Edge Select (T0SE Bit) ............................... 160
Source Select (T0CS Bit) ........................................ 160
Switching Prescaler Assignment ............................. 161
Timer1 ............................................................................. 163
Associated registers ................................................ 174
2010 Microchip Technology Inc.
Preliminary
DS41412A-page 487

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]