PIC18LF8410-I/PTQTP View Datasheet(PDF) - Microchip Technology
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Manufacturer
PIC18LF8410-I/PTQTP Datasheet PDF : 404 Pages
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PIC18F6310/6410/8310/8410
TABLE 26-7: PLL CLOCK TIMING SPECIFICATIONS (VDD = 4.2V TO 5.5V)
Param
No.
Sym
Characteristic
Min
Typ†
Max Units Conditions
F10 FOSC Oscillator Frequency Range
4
—
10 MHz HS mode only
F11 FSYS On-Chip VCO System Frequency
16
—
40 MHz HS mode only
F12
trc
PLL Start-up Time (Lock Time)
F13 ∆CLK CLKO Stability (Jitter)
—
—
2
ms
-2
—
+2
%
† Data in “Typ” column is at 5V, 25°C, unless otherwise stated. These parameters are for design guidance
only and are not tested.
TABLE 26-8: AC CHARACTERISTICS:INTERNAL RC ACCURACY
PIC18F6310/6410/8310/8410 (INDUSTRIAL)
PIC18LF6310/6410/8310/8410 (INDUSTRIAL)
PIC18LF6310/6410/8310/8410
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +85°C for industrial
PIC18F6310/6410/8310/8410
(Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +85°C for industrial
Param
No.
Device
Min
Typ Max Units
Conditions
INTOSC Accuracy @ Freq = 8 MHz, 4 MHz, 2 MHz, 1 MHz, 500 kHz, 250 kHz, 125 kHz(1)
PIC18LF6310/6410/8310/8410 -2
+/-1
2
%
+25°C
VDD = 2.7-3.3 V
-5
—
5
% -10°C to +85°C VDD = 2.7-3.3 V
-10
+/-1
10
% -40°C to +85°C VDD = 2.7-3.3 V
PIC18F6310/6410/8310/8410 -2
+/-1
2
%
+25°C
VDD = 4.5-5.5 V
-5
—
5
% -10°C to +85°C VDD = 4.5-5.5 V
-10
INTRC Accuracy @ Freq = 31 kHz(2)
+/-1
10
% -40°C to +85°C VDD = 4.5-5.5 V
PIC18LF6310/6410/8310/8410 26.562 — 35.938 kHz -40°C to +85°C VDD = 2.7-3.3 V
PIC18F6310/6410/8310/8410 26.562
INTRC Stability(3)
— 35.938 kHz -40°C to +85°C VDD = 4.5-5.5 V
F7
PIC18LF6310/6410/8310/8410 TBD
1
TBD %
+25°C
VDD = 2.0V
F8
TBD
1
TBD %
+25°C
VDD = 3.0V
F9
All devices TBD
1
TBD %
+25°C
VDD = 5.0V
Legend:
Note 1:
2:
3:
TBD = To Be Determined. Shading of rows is to assist in readability of the table.
Frequency calibrated at 25°C. OSCTUNE register can be used to compensate for temperature drift.
INTRC frequency after calibration.
Change of INTRC frequency as VDD changes.
2004 Microchip Technology Inc.
Preliminary
DS39635A-page 361
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