PIC18F96J65T-I/PF View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F96J65T-I/PF

64/80/100-Pin, High-Performance, 1-Mbit Flash Microcontrollers with Ethernet

Microchip Technology 

PIC18F97J60 FAMILY

FIGURE 28-10: CAPTURE/COMPARE/PWM TIMINGS (INCLUDING ECCPx MODULES)

CCPx

(Capture Mode)

50

51

52

CCPx

(Compare or PWM Mode)

53

54

Note: Refer to Figure 28-3 for load conditions.

TABLE 28-14: CAPTURE/COMPARE/PWM REQUIREMENTS (INCLUDING ECCPx MODULES)

Param

No.

Symbol

Characteristic

Min

Max Units Conditions

50

TCCL CCPx Input Low No prescaler

Time

With prescaler

51

TCCH CCPx Input

No prescaler

High Time

With prescaler

52

TCCP CCPx Input Period

53

TCCR CCPx Output Fall Time

54

TCCF CCPx Output Fall Time

0.5 TCY + 20

—

10

—

0.5 TCY + 20

—

10

—

3 TCY + 40

—

N

—

25

—

25

ns

ns

ns

ns

ns N = prescale

value (1, 4 or 16)

ns

ns

TABLE 28-15: PARALLEL SLAVE PORT REQUIREMENTS

Param.

No.

Symbol

Characteristic

Min Max Units

62

TdtV2wrH Data In Valid before WR  or CS  (setup time) 20 — ns

63

TwrH2dtI WR  or CS  to Data–In Invalid (hold time)

20 — ns

64

TrdL2dtV RD  and CS  to Data–Out Valid

— 80 ns

65

TrdH2dtI RD  or CS  to Data–Out Invalid

10 30 ns

66

TibfINH

Inhibit of the IBF Flag bit being Cleared from

— 3 TCY

WR  or CS 

Conditions

DS39762F-page 452

 2011 Microchip Technology Inc.

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