PSD211R Family
Programmable
Address
Decoder (PAD)
Figure 4. PAD Description
ALE or AS
RD/E
WR or R/W
A19
A18
A17
A16
A15
A14
A13
A12
A11
CSI
RESET
ES0
ES1
ES2
ES3
8 EPROM BLOCK
ES4
SELECT LINES
ES5
ES6
ES7
PAD
A
CSIOPORT I/O BASE ADDRESS
CS0/PB0
CS1/PB1
CS2/PB2
CS3/PB3
CS4/PB4
CS5/PB5
CS6/PB6
CS7/PB7
CS8/PC0
CS9/PC1
CS10/PC2
PAD
B
NOTES:
1. CSI is a power-down signal. When high, the PAD is in stand-by mode and all its outputs
become non-active. See Tables 7A and 7B.
2. RESET deselects all PAD output signals. See Tables 8A and 8B.
3. A18, A17, and A16 are internally multiplexed with CS10, CS9, and CS8, respectively.
Either A18 or CS10, A17 or CS9, and A16 or CS8 can be routed to the external pins of
Port C. Port C can be configured as either input or output.
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