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ZPSD211RM View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ZPSD211RM Datasheet PDF : 51 Pages
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Programmable
Address
Decoder (PAD)
(cont.)
PSD211R Family
Table 4. PSD211R PAD A and PAD B Functions
PAD A and PAD B Inputs
Function
A19/CSI
In CSI mode (when high), PAD deselects all of its outputs and enters a
power-down mode (see Tables 7A and 7B). In A19 mode, it is another
input to the PAD.
A16–A18 These are general purpose inputs from Port C. See Figure 4, Note 3.
A11–A15 These are address inputs.
RD/E
This is the read pulse or enable strobe input.
WR or R/W This is the write pulse or R/W select signal.
ALE/AS This is the ALE or AS input to the chip.
RESET
This deselects all outputs from the PAD; it can not be used in product
term equations. See Tables 8A and 8B.
PAD A Outputs
ES0–ES7
These are internal chip-selects to the 8 EPROM banks. Each bank can
be located on any boundary that is a function of one product term of the
PAD address inputs.
CSIOPORT
This internal chip-select selects the I/O ports. It can be placed on any
boundary that is a function of one product term of the PAD inputs. See
Table 5.
PAD B Outputs
CS0 – CS3
These chip-select outputs can be routed through Port B. Each of them is
a function of up to four product terms of the PAD inputs.
CS4 –CS7
These chip-select outputs can be routed through Port B. Each of them is
a function of up to two product terms of the PAD inputs.
CS8 – CS10
These chip-select outputs can be routed through Port C. See Figure 4,
Note 3. Each of them is a function of one product term of the PAD inputs.
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