ZPSD211RVL View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ZPSD211RVL Datasheet PDF : 51 Pages
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10.0
I/O Port
Functions
(Cont.)
PSD211R Family
10.4 Port C (PC0-PC2)
Each pin of Port C (Figure 7) can be configured as an input to PAD A and PAD B, or as an
output from PAD B. As inputs, the pins are referenced as A16-A18. Although the pins are
given this reference, they can be used for any address or logic input. [For example, A8-A10
could be connected to those pins to improve the resolution (boundaries) of CS0-CS7 to
256 bytes.] How they are defined in the PSDsoft design file determines:
• Whether they are address or logic inputs
• Whether the input is transparent or latched by the trailing edge of ALE/AS.
Notes:
1) If the inputs are addresses, they are routed to PAD A and B, and can be used in any or
all PAD equations.
2) If the inputs are logic, they are routed to PAD B and can be used for Boolean equations
that are implemented in any or all of the CS0-CS10 PAD B outputs.
3) If Port C pins are configured as inputs, they can not be individually configured as
address or logic and latched or transparent. They must be configured as a group to be
address or logic and latched or transparent.
Alternately, PC0-PC2 can become CS8-CS10 outputs, respectively, providing the user with
more external chip-select PAD outputs. Each of the signals (CS8-CS10) is comprised of
one product term.
Figure 7. Port C (PC0-PC2) Pin Structure
From PAD
A16/A17/A18
To PAD
CS8 / CS9 / C S10
Latched Address
Input
QD
En
Logic Input
Address In or
Chip Select Out
D
E
M
ALE
U
X
Port C I/O1
(PC0 / P C1/ P C2)
Input or Output
Set by PSDsoft 2
PSDsoft 2
NOTES: 1. Port C pins can be individually configured as inputs or outputs, but not both.
2. PSDsoft sets this configuration prior to run-time based on your PSDsoft design file.
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