PSD934210MT View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

PSD934210MT

Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit + 256 Kbit Dual Flash Memories and 64 Kbit SRAM

STMicroelectronics 

Figure 25. Port A and Port B Structure

PSD834F2V

WR

ADDRESS

ALE

DATA OUT

REG.

DQ

DQ

G

MACROCELL OUTPUTS

READ MUX

P

D

B

CONTROL REG.

DQ

WR

DIR REG.

DQ

WR

ENABLE PRODUCT TERM (.OE)

DATA OUT

ADDRESS

A[ 7:0] OR A[15:8]

OUTPUT

MUX

DATA IN

OUTPUT

SELECT

ENABLE OUT

PORT

A OR B PIN

INPUT

MACROCELL

CPLD - INPUT

Ports A and B – Functionality and Structure

Ports A and B have similar functionality and struc-

ture, as shown in Figure 25. The two ports can be

configured to perform one or more of the following

functions:

s MCU I/O Mode

s CPLD Output – Macrocells McellAB7-McellAB0

can be connected to Port A or Port B. McellBC7-

McellBC0 can be connected to Port B or Port C.

s CPLD Input – Via the Input Macrocells (IMC).

s Latched Address output – Provide latched

address output as per Table 20.

AI02887

s Address In – Additional high address inputs

using the Input Macrocells (IMC).

s Open Drain/Slew Rate – pins PA3-PA0 and

PB3-PB0 can be configured to fast slew rate,

pins PA7-PA4 and PB7-PB4 can be configured

to Open Drain Mode.

s Data Port – Port A to D7-D0 for 8 bit non-

multiplexed bus

s Multiplexed Address/Data port for certain types

of MCU bus interfaces.

s Peripheral Mode – Port A only

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