PSD834F2V
2. Typical current consumption assuming no PLD inputs are changing state and the PLD Turbo bit is 0.
For Users of the HC11 (or compatible). The
HC11 turns off its E clock when it sleeps. There-
fore, if you are using an HC11 (or compatible) in
your design, and you wish to use the Power-down
mode, you must not connect the E clock to CLKIN
(PD1). You should instead connect a crystal oscil-
lator to CLKIN (PD1). The crystal oscillator fre-
quency must be less than 15 times the frequency
of AS. The reason for this is that if the frequency is
greater than 15 times the frequency of AS, the
PSD keeps going into Power-down mode.
Figure 30. Enable Power-down Flow Chart
RESET
Enable APD
Set PMMR0 Bit 1 = 1
OPTIONAL
Disable desired inputs to PLD
by setting PMMR0 bits 4 and 5
and PMMR2 bits 2 through 6.
No
ALE/AS idle
for 15 CLKIN
clocks?
Yes
PSD in Power
Down Mode
AI02892
Other Power Saving Options. The PSD offers
other reduced power saving options that are inde-
pendent of the Power-down mode. Except for the
SRAM Stand-by and PSD Chip Select Input (CSI,
PD2) features, they are enabled by setting bits in
PMMR0 and PMMR2.
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