STG3005A2STR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STG3005A2STR

128-BIT 3D MULTIMEDIA ACCELERATOR

STMicroelectronics 

128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA128ZX

5 PCI 2.1 LOCAL BUS INTERFACE

5.1 RIVA128ZX PCI INTERFACE

The RIVA128ZX supports a glueless interface to PCI 2.1 with both master and slave capabilities. The host

interface is fully compliant with the 32-bit PCI 2.1 specification.

The Multimedia Accelerator supports PCI bus operation up to 33MHz with zero-wait state capability and

full bus mastering capability handling burst reads and burst writes.

Figure 16. PCI interface pin connections

PCIAD[31:0]

32

PCICBE[3:0]#

4

PCIFRAME#

PCIDEVSEL#

PCIIRDY#

PCITRDY#

PCISTOP#

PCIIDSEL

PCIPAR

PCIREQ#

PCIGNT#

PCICLK

PCIRST#

PCIINTA#

RIVA128ZX

Table 5. PCI bus commands supported by the RIVA128ZX

Bus master

Memory read and write

Memory read line

Memory read multiple

Bus slave

Memory read and write

I/O read and write

Configuration read and write

Memory read line

Memory read multiple

Memory write invalidate

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