Si3016
5. Control Registers
Note: Any register not listed here is reserved and must not be written.
Table 13. Register Summary
Register Name
1 Control 1
2 Control 2
3:4 Reserved
5 DAA Control 1
6 DAA Control 2
7:8 Reserved
9 Sample Rate Control
10 Reserved
11 Chip A Revision
12 Line Side Status
13 Chip B Revision
14 Line Side Validation
15 TX/RX Gain Control
16 International Control 1
17 International Control 2
18 International Control 3
19 International Control 4
Bit 7
SR
Bit 6
Bit 5
Bit 4
Bit 3
AL
Bit 2
Bit 1
DL
HBE
Bit 0
RXE
RDTN RDTP
ATM[1] ARM[1] PDL
ONHM
PDN
RDT
OH
ATM[0] ARM[0]
SRC[2:0]
CLE
TXM
OFF/
SQL2
FULL
FDT
CBID
ATX[2:0]
OHS ACT
REVA[3:0]
LCS[3:0]
REVB[3:0]
ARXB ATXB
CHK CIP SAFE
RXM
ARX[2:0]
DCT[1:0]
RZ
RT
MCAL CALD LIM
DIAL FJM VOL
LVCS[4:0]
OPE
FLVM
BTE ROV
MODE RFWE
OVL DOD
BTD
SQLH
OPD
26
Rev. 1.0