SI3016-F-FS View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

SI3016-F-FS

3.3 V ENHANCED GLOBAL DIRECT ACCESS ARRANGEMENT

Silicon Laboratories 

Si3016

Register 13. Chip B Revision

Bit

Name

Type

D7

D6

D5

CBID

R

D4

D3

REVB[3:0]

R

D2

D1

D0

ARXB

ATXB

R/W

R/W

Reset settings = N/A

Bit Name

Function

7 Reserved Read returns zero.

6

CBID Chip B ID.

0 = Indicates the line side is domestic only.

1 = Indicates the line side has international support.

5:2 REVB[3:0] Chip B Revision.

Four-bit value indicating the revision of the Si3016 (line-side) chip.

1

ARXB Receive Gain.

0 = 0 dB gain is applied.

1 = A 6 dB gain is applied to the receive path.

Note: This bit should not be used. The Si3016 has the additional receive gain settings ARX[2:0]. ARXB

should be set to 0 and the ARX bits should be used.

0

ATXB Transmit Attenuation.

0 = 0 dB gain is applied.

1 = A 3 dB attenuation is applied to the transmit path.

Note: This bit should not be used. The Si3016 has the additional transmit gain settings ATX[2:0]. ATXB

should be set to 0 and the ATX bits should be used.

Rev. 1.0

33

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