PLEASE NOTE: The SMB118 has entered End-of-Life.
SMB118/218
APPLICATIONS INFORMATION
DEVICE OPERATION
POWER SUPPLY
The SMB118 and SMB218 can be powered from an
input voltage between +2.7 and +6 volts applied
between the VBATT pin and ground. The input voltage
applied to the VBATT pin is filtered by an external filter
capacitor attached between the VDD_CAP pin and
ground; this filtered voltage is then used as an internal
VDD supply. The VDD_CAP node is monitored by an
Under-Voltage Lockout (UVLO) circuit, which prevents
the outputs from turning on when the voltage at this
node is less than the UVLO threshold.
When the voltage on the DOCK_DC input exceeds that
on the VBATT input the VBATT pin goes into a high
impedance state and no longer powers the devices,
and the DOCK_DC pin becomes the new power input.
SHUTDOWN
The SMB118 and SMB218 are equipped with a
shutdown pin that disconnects power from the devices
and reduces the current consumption to 0.6µA when
asserted. When the SHDN pin is pulled high, all outputs
will be disabled and the SMB118 and SMB218 will not
respond to I2C commands.
To exit the shutdown mode the SHDN pin can be pulled
high, or voltage can be applied to the DOCK_DC input.
When voltage is present on the DOCK_DC input the
device will exit the shutdown mode and operate
normally.
POWER-ON/OFF CONTROL
Sequencing can be initiated: automatically, by a volatile
I2C Power on command, or by asserting the PWREN
pin. When the PWREN pin is programmed to initiate
sequencing, it can be level or edge triggered. The
PWREN input has a programmable de-bounce time of
100, 50, or 25ms. The de-bounce time can also be
disabled.
When configured as a push-button enable, the PWREN
must be low longer than the debounce time before
sequencing can commence, and pulled low for the
same period to disable the channels.
When a software power off command is written to the
volatile memory the system will be powered off
regardless of the state of the PWREN pin.
ENABLE
Each output can be enabled and disable by an enable
signal. The enable signal is can be provided from either
the PWREN pin or by the contents of the enable
register.
When enabling a channel from the enable register, the
register contents default state must be set so that the
output will be enabled or disabled following a POR
(power on reset). The default state is programmable.
CASCADE SEQUENCING
Each channel on the SMB118 and SMB218 may be
placed in any one of 6 unique sequence positions, as
assigned by the configurable non-volatile register
contents. The SMB118 and SMB218 navigate between
each sequence position using a feedback-based
cascade-sequencing circuit. Cascade sequencing is the
process in which each channel is continually compared
against a programmable reference voltage until the
voltage on the monitored channel exceeds the
reference voltage, at which point an internal sequence
position counter is incremented and the next sequence
position is entered. In the event that a channels enable
input is not asserted when the channel is to be
sequenced on, that sequence position will be skipped
and the channel in the next sequence position will be
enabled.
Figure 4 – Power on sequencing waveforms.
Time = 4ms/devision, Scale = 1V/devision
Ch 1 = 3.3V output (Yellow trace)
Ch 2 = 2.5V output (Blue trace)
Ch 3 = 1.8V output (Purple trace)
Ch 4 = 1.2V output (Green trace)
POWER ON/OFF DELAY
There is a programmable delay between when
channels in subsequent sequence positions are
enabled. The delay is programmable at 50, 25, 12.5
and 1.5ms intervals. This delay is programmable for
each of the four sequence positions.
MANUAL MODE
The SMB118 and SMB218 provide a manual power-on
mode in which each channel may be enabled
Summit Microelectronics, Inc
2107 3.0 10/15/2008
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