16 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemory
SST34HF1621C / SST34HF1641C
TBP
ADDRESS A19-0
BEF#
OE#
555
TAH
TCP
2AA
TAS
TCPH
555
ADDR
TCH
WE#
RY/BY#
DQ15-0
XXAA
TCS?
TBY
XX55
TDS
TDH
XXA0
DATA
WORD
(ADDR/DATA)
Note: X can be VIL or VIH, but no other value.
FIGURE 11: Flash BEF# Controlled Program Cycle Timing Diagram for Word Mode
(For Byte Mode A-1 = Address Input)
Data Sheet
TBR
VALID
1252 F09.1
ADDRESS A19-0
BEF#
OE#
WE#
RY/BY#
DQ7
TOEH
TBY
TCE
TOE
DATA
DATA#
DATA#
FIGURE 12: Flash Data# Polling Timing Diagram for Word Mode
(For Byte Mode A-1 = Address Input)
©2006 Silicon Storage Technology, Inc.
23
TOES
DATA
1252 F10.0
S71252-03-000
8/06