SST34HF1641C-70-4E-L1PE View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST34HF1641C-70-4E-L1PE
Silicon Storage Technology
SST34HF1641C-70-4E-L1PE Datasheet PDF : 38 Pages
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16 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemory
SST34HF1621C / SST34HF1641C
Data Sheet
ADDRESS
A19-0
BEF#
OE#
WE#
RY/BY#
DQ15-0
SIX-BYTE CODE FOR BLOCK-ERASE
555
2AA
555
555
2AA
BAX
TWP
XXAA XX55
XX80
XXAA
XX55
XX50
TBE
TBY
TBR
VALID
Note: This device also supports BEF# controlled Block-Erase operation.
The WE# and BEF# signals are interchangeable as long as minimum timings are met. (See Table 16.)
BAX = Block Address
X can be VIL or VIH, but no other value.
1252 F13.1
FIGURE 15: Flash WE# Controlled Block-Erase Timing Diagram for Word Mode
(For Byte Mode A-1 = Don’t Care)
SIX-BYTE CODE FOR SECTOR-ERASE
TSE
ADDRESS
A19-0
555
2AA
555
555
2AA
SAX
BEF#
OE#
WE#
RY/BY#
TWP
TBR
TBY
DQ15-0
XXAA XX55
XX80
XXAA
XX55
XX30
VALID
Note: This device also supports BEF# controlled Sector-Erase operation.
The WE# and BEF# signals are interchangeable as long as minimum timings are met. (See Table 16.)
SAX = Sector Address
X can be VIL or VIH, but no other value.
1252 F14.1
FIGURE 16: Flash WE# Controlled Sector-Erase Timing Diagram for Word Mode
(For Byte Mode A-1 = Don’t Care)
©2006 Silicon Storage Technology, Inc.
25
S71252-03-000
8/06
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