ST72334N2B7(2003) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST72334N2B7
(Rev.:2003)
(Rev.:2003)
STMicroelectronics
ST72334N2B7 Datasheet PDF : 153 Pages
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ST72334J/N, ST72314J/N, ST72124J
16.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for VDD, fOSC, and TA.
16.5.1 General Timings
Symbol
Parameter
Conditions
tc(INST)
tv(IT)
Instruction cycle time
Interrupt reaction time 2)
tv(IT) = ∆tc(INST) + 10
fCPU=8MHz
fCPU=8MHz
16.5.2 External Clock Source
Symbol
VOSC1H
VOSC1L
tw(OSC1H)
tw(OSC1L)
tr(OSC1)
tf(OSC1)
IL
Parameter
OSC1 input pin high level voltage
OSC1 input pin low level voltage
OSC1 high or low time 3)
OSC1 rise or fall time 3)
OSCx Input leakage current
Conditions
see Figure 67
VSS≤VIN≤VDD
Figure 67. Typical Application with an External Clock Source
Min
Typ 1)
Max
2
3
12
250
375
1500
10
22
1.25
2.75
Unit
tCPU
ns
tCPU
µs
Min
Typ
0.7xVDD
VSS
15
Max
VDD
0.3xVDD
Unit
V
ns
15
±1
µA
VOSC1H
VOSC1L
90%
10%
tr(OSC1)
tf(OSC1)
tw(OSC1H)
tw(OSC1L)
EXTERNAL
CLOCK SOURCE
OSC2
OSC1
Not connected internally
fOSC
IL
ST72XXX
Notes:
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch. ∆tc(INST) is the number of tCPU cycles needed to finish
the current instruction execution.
3. Data based on design simulation and/or technology characteristics, not tested in production.
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