ST5090
SERIAL CONTROL PORT TIMING
Symbol
fCCLK
tWCH
tWCL
tRC
tFC
tHCS
tSSC
tSDC
tHCD
tDCD
tDSD
tDDZ
tHSC
tSCS
Parameter
Frequency of CCLK
Period of CCLK high
Period of CCLK low
Rise Time of CCLK
Fall Time of CCLK
Hold Time, CCLK high to CS– low
Setup Time, CS– low to CCLK high
Setup Time, CI valid to CCLK high
Hold Time, CCLK high to CI invalid
Delay Time, CCLK low to CO
data valid
Delay Time, CS–low to CO data
valid
Delay Time CS–high or 8th CCLK
low to CO high impedance
whichever comes first
Hold Time, 8th CCLK high to
CS– high
Setup Time, CS– high to CCLK high
Test Condition
Measured from VIH to VIH
Measured from VIL to VIL
Measured from VIL to VIH
Measured from VIH to VIL
Load = 100 pF
Min .
160
160
10
50
50
50
10
100
100
Note 5:
A signal is valid if it is above VIH or below VIL and invalid if it is between VIL and VIH.
For the purpoes of this specification the following conditions apply:
a) All input signal are defined as: VIL = 0.2VCC, VIH = 0.8VCC, tR < 10ns, tF < 10ns.
b) Delay times are measured from the inputs signal valid to the output signal valid.
c) Setup times are measured from the data input valid to the clock input invalid.
d) Hold times are measured from the clock signal valid to the data input invalid.
Typ.
Max.
2.048
50
50
80
50
80
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ELECTRICAL CHARACTERISTICS (unless otherwise specified, VCC = 3.3V + 10% or 5V ±10%, TA = –-30°C
to 85°C ; typical characteristic are specified at VCC = 3.3V, TA = 25°C ; all signals are referenced to GND)
DIGITAL INTERFACES
Symbol
VIL
Parameter
Input Low Voltage
VIH
Input High Voltage
VOL
Output Low Voltage
VOH
Output High Voltage
IIL
Input Low Current
IIH
Input High Current
IOZ
Output Current in High
impedance (Tri-state)
Test Condition
All digital inputs
Min .
DC
AC
All digital inputs
DC 0.7VCC
AC 0.8VCC
All digital outputs, IL = 10µA
All digital outputs, IL = 2mA
All digital outputs, IL = 10µA
All digital outputs, IL = 2mA
Any digital input,
GND < VIN < VIL
Any digital input,
VIH < VIN < VCC
DX and CO
VCC-0.1
VCC-0.4
-10
-10
-10
Typ.
Max.
0.3VCC
0.2VCC
0.1
0.4
10
10
10
Unit
V
V
V
V
V
V
V
V
µA
µA
µA
A.C. TESTING INPUT, OUTPUT WAVEFORM
INTPUT/OUTPUT
0.8VCC
0.7VCC
0.2VCC
0.3VCC
TEST POINTS
0.7VCC
0.3VCC
D93TL077
AC Testing: inputs are driven at 0.8VCC for
a logic ”1”and 0.2VCC for a logic ”0 ”.
Timing measurements are made at 0.7VCC
for a logic ”1”and 0.3VCC for a logic ”0”.
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