ST72F521R9TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72F521R9TC

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72521

CONTROLLER AREA NETWORK (Cont’d)

Software Work-around - Devices with Hard-

ware Fix (ST72F521 rev “R”):

To implement a transmission abort under safe

conditions, the LOCK bit must not be reset during

the critical window (2 bit times). A new function

has been implemented in the MCU allowing the

application to synchronize the reset of the LOCK

bit (abort request) with the reset of the TXRQST bit

(internal signal) in the pCAN core.

The synchronization is done using the WKPS bit in

the CANCSR register, the function of this bit has

been modified and no more Wake-up Pulse (dom-

inant bit) is sent on the CAN_TX signal when the

WKPS bit is set. This means the the functionality

described in the datasheet is no longer applicable

(see Section 10.8.5.4).

To abort the transmission, first the application sets

the WKPS bit and polls it until it is set. The maxi-

mum time needed to set this bit is two CAN bit

times. Once the application has read the WKPS bit

as one, it can reset the LOCK bit to stop the cur-

rent transmission.

The abort is completed when the LOCK bit is read

back as zero by the application. Once the abort

has been completed, the application must reset

the WKPS bit to be able to transmit again. Of

course the transmit buffer must be in LOCK state

as usual before any transmission attempt.

The “C” code sequence below shows the software

work-around using the WKPS bit.

CANCSR |= WKPS; // Set WKPS bit

while(!(CANCSR & WKPS) );// Wait until WKPS bit is set

while( CANBCSR & LOCK )// Wait until abort has been confirmed

{

CANBCSR &= ~LOCK;

}

CANCSR &= ~WKPS; // Allow transmission again

CANBCSR |= LOCK;

//Alloc buffer for next transmission

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