ST7265x
INTERRUPTS (Cont’d)
Table 9. Dedicated Interrupt Instruction Set
Instruction
HALT
IRET
JRM
JRNM
POP CC
RIM
SIM
TRAP
WFI
New Description
Entering Halt mode
Interrupt routine return
Jump if I1:0=11
Jump if I1:0<>11
Pop CC from the Stack
Enable interrupt (level 0 set)
Disable interrupt (level 3 set)
Software trap
Wait for interrupt
Function/Example
Pop CC, A, X, PC
I1:0=11 ?
I1:0<>11 ?
Mem => CC
Load 10 in I1:0 of CC
Load 11 in I1:0 of CC
Software NMI
I1 H I0 N Z C
1
0
I1 H I0 N Z C
I1 H I0 N Z C
1
0
1
1
1
1
1
0
Note: During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI instructions
change the current software priority up to the next IRET instruction or one of the previously mentioned
instructions.
In order not to lose the current software priority level, the RIM, SIM, HALT, WFI and POP CC instructions
should never be used in an interrupt routine.
Table 10. Interrupt Mapping
N°
Source
Block
Description
RESET Reset
TRAP
Software Interrupt
0
ICP
Flash Start Programming NMI Interrupt
1
PLG
Power Management USB Plug/Unplug
2
EI0
External Interrupt Port A
3
DTC
DTC Peripheral Interrupt
4
USB
USB Peripheral Interrupt
5
ESUSP USB End Suspend Interrupt
6
EI1
External Interrupt Port D
7
I2C
I2C Interrupt
8
TIM
Timer interrupt
9
EI2
External Interrupt Port C
10
SPI
SPI interrupt
Register
Label
N/A
PCR
N/A
DTCSR
USBISTR
USBISTR
N/A
I2CSRx
TSR
N/A
SPICSR
Priority
Order
Highest
Priority
Lowest
Priority
Exit
from
HALT
yes
no
yes
yes
yes
no
no
yes
yes
no
no
yes
yes
Address
Vector
FFFEh-FFFFh
FFFCh-FFFDh
FFFAh-FFFBh
FFF8h-FFF9h
FFF6h-FFF7h
FFF4h-FFF5h
FFF2h-FFF3h
FFF0h-FFF1h
FFEEh-FFEFh
FFECh-FFEDh
FFEAh-FFEBh
FFE8h-FFE9h
FFE6h-FFE7h
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