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ST7265X View Datasheet(PDF) - STMicroelectronics

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ST7265X Datasheet PDF : 166 Pages
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ST7265x
I/O PORTS (Cont’d)
Figure 35. I/O Port General Block Diagram
REGISTER
ACCESS
ALTERNATE
OUTPUT
1
0
ALTERNATE
ENABLE
DR
VDD
P-BUFFER
(see table below)
PULL-UP
(see table below)
VDD
DDR
OR
OR SEL
If implemented
DDR SEL
DR SEL
PULL-UP
CONFIGURATION
PAD
N-BUFFER
CMOS
SCHMITT
TRIGGER
DIODES
(see table below)
ANALOG
INPUT
EXTERNAL
INTERRUPT
SOURCE (eix)
POLARITY
SELECTION
FROM
OTHER
BITS
ALTERNATE
INPUT
Table 12. I/O Port Mode Options
Configuration Mode
Input
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Output
Open Drain (logic level)
True Open Drain
Legend: NI - not implemented
Off - implemented not activated
On - implemented and activated
Pull-Up
Off
On
Off
NI
P-Buffer
Off
On
Off
NI
Diodes
to VDD
to VSS
On
On
NI (see note)
Note: The diode to VDD is not implemented in the true open drain pads. A local protection between the
pad and VSS is implemented to protect the device against positive stress.
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