ST7MC2N6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7MC2N6

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

12.2 ABSOLUTE MAXIMUM RATINGS

Stresses above those listed as “absolute maxi-

mum ratings” may cause permanent damage to

the device. This is a stress rating only and func-

tional operation of the device under these condi-

12.2.1 Voltage Characteristics

tions is not implied. Exposure to maximum rating

conditions for extended periods may affect device

reliability.

Symbol

VDD - VSS

VPP - VSS

VIN

|ΔVDDx| and |ΔVSSx|

|VSSA - VSSx|

VESD(HBM)

VESD(CDM)

Ratings

Supply voltage

Programming Voltage

Input voltage on any pin 1) & 2)

Variations between different digital power pins

Variations between digital and analog ground pins

Electro-static discharge voltage (Human Body Model)

Electro-static discharge voltage

(Charged Device Model)

Maximum value

6.5

13

VSS-0.3 to VDD+0.3

50

50

Unit

V

mV

see section 12.7.3 on page 263

12.2.2 Current Characteristics

Symbol

Ratings

Maximum value

Unit

32-pin devices

75

IVDD

Total current into VDD power lines

(source) 3)

44-pin devices

56, 64, 80-pin

devices

125

175

32-pin devices

75

IVSS

Total current out of VSS ground lines 44-pin devices

(sink) 3)

56, 64, 80-pin

devices

125

175

Output current sunk by any standard I/O and control pin

25

mA

IIO

IINJ(PIN) 2) & 4)

ΣIINJ(PIN) 2)

Output current sunk by any high sink I/O pin

Output current source by any I/Os and control pin

Injected current on VPP pin

Injected current on RESET pin

Injected current on OSC1 and OSC2 pins

Injected current on any other pin 5)

Total injected current (sum of all I/O and control pins) 5)

50

- 25

±5

±5

±5

±5

± 20

Notes:

1. Directly connecting the RESET and I/O pins to VDD or VSS could damage the device if an unintentional internal reset

is generated or an unexpected change of the I/O configuration occurs (for example, due to a corrupted program counter).

To guarantee safe operation, this connection has to be done through a pull-up or pull-down resistor (typical: 4.7kΩ for

RESET, 10kΩ for I/Os). For the same reason, unused I/O pins must not be directly tied to VDD or VSS.

2. IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be

respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN>VDD

while a negative injection is induced by VIN<VSS.

3. All power (VDD) and ground (VSS) lines must always be connected to the external supply.

4. Negative injection disturbs the analog performance of the device. See note in “ADC Accuracy with VDD=5.0V” on

page 284.

For best reliability, it is recommended to avoid negative injection of more than 1.6mA

5. When several inputs are submitted to a current injection, the maximum ΣIINJ(PIN) is the absolute sum of the positive

and negative injected currents (instantaneous values). These results are based on characterisation with ΣIINJ(PIN) maxi-

mum current injection on four I/O port pins of the device.

248/309

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