ST7MC2N6T3 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7MC2N6T3

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

ON-CHIP PERIPHERALS (Cont’d)

Output compare and Time base interrupt

On overflow, the OVF flag of the ARTCSR register

is set and an overflow interrupt request is generat-

ed if the overflow interrupt enable bit, OIE, in the

ARTCSR register, is set. The OVF flag must be re-

set by the user software. This interrupt can be

used as a time base in the application.

External clock and event detector mode

Using the fEXT external prescaler input clock, the

auto-reload timer can be used as an external clock

event detector. In this mode, the ARTARR register

is used to select the nEVENT number of events to

be counted before setting the OVF flag.

nEVENT = 256 - ARTARR

Caution: The external clock function is not availa-

ble in Halt mode. If Halt mode is used in the appli-

cation, prior to executing the HALT instruction, the

counter must be disabled by clearing the TCE bit

in the ARTCSR register to avoid spurious counter

increments.

Figure 42. External Event Detector Example (3 counts)

fEXT=fCOUNTER

ARTARR=FDh

COUNTER FDh

FEh

FFh

FDh

FEh

FFh

FDh

OVF

ARTCSR READ

ARTCSR READ

INTERRUPT

IF OIE=1

INTERRUPT

IF OIE=1

t

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