ST92E163N4D0 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92E163N4D0

8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS, 20K ROM, 2K RAM, I2C, SCI, & MFT

STMicroelectronics 

ST92163 - GENERAL DESCRIPTION

Page

No.

20

21

24

Block

I2C

MMU

EXTMI

SCI

Reg.

No.

R240

R241

R242

R243

R244

R245

R246

R247

R248

R249

R250

R251

R252

R253

R254

R255

R240

R241

R242

R243

R244

R248

R249

R245

R246

R240

R241

R242

R243

R244

R245

R246

R247

R248

R248

R249

R250

R251

R252

R253

R254

R255

Register

Name

I2CCR

I2CSR1

I2CSR2

I2CCCR

I2COAR1

I2COAR2

I2CDR

I2CADR

I2CISR

I2CIVR

I2CRDAP

I2CRDC

I2CTDAP

I2CTDC

I2CECCR

I2CIMR

DPR0

DPR1

DPR2

DPR3

CSR

ISR

DMASR

EMR1

EMR2

RDCPR

RDAPR

TDCPR

TDAPR

S_IVR

ACR

IMR

S_ISR

RXBR

TXBR

IDPR

CHCR

CCR

BRGHR

BRGLR

SICR

SOCR

Description

I2C Control Register

I2C Status Register 1

I2C Status Register 2

I2C Clock Control Register

I2C Own Address Register 1

I2C Own Address Register 2

I2C Data Register

I2C General Call Address

I2C Interrupt Status Register

I2C Interrupt Vector Register

Receiver DMA Source Addr. Pointer

Receiver DMA Transaction Counter

Transmitter DMA Source Addr. Pointer

Transmitter DMA Transaction Counter

I2C Extended Clock Control Register

I2C Interrupt Mask Register

Data Page Register 0

Data Page Register 1

Data Page Register 2

Data Page Register 3

Code Segment Register

Interrupt Segment Register

DMA Segment Register

External Memory Register 1

External Memory Register 2

Receiver DMA Transaction Counter Pointer

Receiver DMA Source Address Pointer

Transmitter DMA Transaction Counter Pointer

Transmitter DMA Destination Address Pointer

Interrupt Vector Register

Address/Data Compare Register

Interrupt Mask Register

Interrupt Status Register

Receive Buffer Register

Transmitter Buffer Register

Interrupt/DMA Priority Register

Character Configuration Register

Clock Configuration Register

Baud Rate Generator High Reg.

Baud Rate Generator Low Register

Synchronous Input Control

Synchronous Output Control

Reset

Value

Hex.

00

00

00

00

00

00

00

A0

xx

xx

xx

xx

xx

xx

00

x0

00

01

02

83

00

x0

x0

80

0F

xx

xx

xx

xx

xx

xx

x0

xx

xx

xx

xx

xx

00

xx

xx

03

01

Doc.

Page

186

187

189

190

190

191

191

191

192

193

193

193

194

194

194

195

42

42

42

42

43

43

43

95

96

165

165

165

165

166

166

167

43

169

169

170

171

172

173

173

173

174

25/224

Share Link: