ST92163 - GENERAL DESCRIPTION
Page
No.
43
55
59
60
62
Block
Reg.
No.
Register
Name
R248
I/O
R249
Port
R250
8
R251
P8C0
P8C1
P8C2
P8DR
R252
I/O
R253
Port
R254
9
R255
P9C0
P9C1
P9C2
P9DR
R240 CLKCTL
RCCU
WUIM U
USB
ADC
R242
R246
R249
R250
R251
R252
R253
R254
R255
R244
R245
R246
R247
R240
R241
R242
CLK_FLAG
PLLCONF
WUCTRL
WUMRH
WUMRL
WUTRH
WUTRL
WUPRH
WUPRL
DEVCONF1
DEVCONF2
MIRRA
MIRRB
ADDTR
ADCLR
ADINT
Description
Port 8 Configuration Register 0
Port 8 Configuration Register 1
Port 8 Configuration Register 2
Port 8 Data Register
Port 9 Configuration Register 0
Port 9 Configuration Register 1
Port 9 Configuration Register 2
Port 9 Data Register
Clock Control Register
Clock Flag Register
PLL Configuration Register
Wake-Up Control Register
Wake-Up Mask Register High
Wake-Up Mask Register Low
Wake-Up Trigger Register High
Wake-Up Trigger Register Low
Wake-Up Pending Register High
Wake-Up Pending Register Low
USB device configuration 1
USB device configuration 2
Mirror Register A
Mirror Register B
Channel i Data Register
Control Logic Register
AD Interrupt Register
Reset
Value
Hex.
Doc.
Page
00
00
00
FF
98
00
00
00
FF
00
81
48, 28
or 08
82
xx
83
00
67
00
68
00
68
00
69
00
69
00
69
00
69
0F 146
00 146
xx 147
xx 147
xx 199
00 199
01 200
Note: xx denotes a byte with an undefined value, but some bits may have defined values. See register description for de-
tails.
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