STA321MPL View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STA321MPL Datasheet PDF : 50 Pages
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Registers
STA321MP
7.2.5 Configuration register G (0x06)
D7
MPCV
0
D6
DCCV
0
D5
HPE
0
D4
AM2E
0
D3
AME
0
D2
COD
0
D1
SID
0
D0
PWMD
0
Bit
0
1
2
RW
RW
RW
RW
RST
Name
0
PWMD
0
SID
0
COD
Description
PWM output disable:
0: PWM output normal
1: no PWM output
Serial interface (I2S out) disable:
0: I2S output normal
1: no I2S output
Clock output disable:
0: clock output normal
1: no clock output
Bit RW RST
Name
Description
3
RW
0
AME
AM mode enable:
0: normal FFX operation
1: AM reduction mode FFX operation
The STA321MP features an FFX processing mode that minimizes the amount of noise
generated in the frequency range of AM radio. This mode is intended for use when FFX is
operating in a device with an active AM tuner. The SNR of the FFX processing is reduced to
~83 dB in this mode, which is still greater than the SNR of AM radio.
Bit RW RST
Name
Description
4
RW
0
AM2E
AM2 mode enable:
0: normal FFX operation
1: AM2 reduction mode FFX operation
The STA321MP features two FFX processing modes that minimize the amount of noise
generated in the frequency range of AM radio. This second mode is intended for use when
FFX is operating in a device with an active AM tuner. This mode eliminates the noise-
shaper.
Bit RW RST
Name
Description
5
RW
0
HPE
FFX headphone enable:
0: channels 7 and 8 normal FFX operation
1: channels 7 and 8 headphone operation
Channels 7 and 8 can be configured to be processed and output in such a manner that
headphones can be driven using an appropriate output device. This signal is a differential
3-wire drive called FFX headphone.
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Doc ID 022647 Rev 1
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