STLC3075 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STLC3075

Integrated POTS interface for home access gateway and WLL

STMicroelectronics 

Electrical characteristics

STLC3075

Table 17. Electrical characteristics (continued)

Symbol

Parameter

Test condition

PSRR and power consumption

PSERRC

Power supply rejection VPOS to

2W port

Ivpos VPOS supply current @ II = 0

Ipk(1) Peak current limiting accuracy

1. Buck-Boost configuration

Vripple = 100 mVrms

50 to 4000 Hz

HI-Z on-hook

Active on-hook

RING (line open)

RING off-hook

RSENSE = 110 mΩ

Min. Typ. Max. Unit

26 36

dB

13 25 mA

50 80 mA

55 90 mA

-20% 900 +20% mApk

6.1

Test circuits

Referring to the application diagram as shown on Figure 10: Application diagram with P-

channel and using the typical values from Table 10: External components for buckboost

configuration and Table 15: External components @gain set = 0 find below the proper

configuration for each measurement.

All measurements requiring DC current termination should be performed using ’Wandel &

Glittering’ DC Loop Holding Circuit GH-1’ or equivalent.

Figure 12. 2W return loss 2WRL = 20Log(|Zref + Zs|/|Zref-Zs|) = 20Log(E/2Vs)

W&G GH1

Zref

600ohm

100µF

1Kohm

E

1Kohm

Vs

100mA

DC mac

Zin = 100K

200 to 6kHz

100µF

TIP

TX

STLC3075

application circuit

RING

RX

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