NXP Semiconductors
TDA1566
I2C-bus controlled dual channel/single channel ampliļ¬er
Table 23. Characteristics ā¦continued
Refer to test circuit (see Figure 22); VP = 14.4 V; RL = 4 ā¦; ā40 °C < Tamb < +85 °C and ā40 °C < Tj < +150 °C; unless
otherwise speciļ¬ed.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VO(offset)
output offset voltage ampliļ¬er mode; on
line driver mode; on
ā50
0
+50
mV
ā25
0
+25
mV
ampliļ¬er and line driver mode;
ā25
0
+25
mV
mute
Mode select pin EN (see Figure 5)
VEN
voltage on pin EN
off condition; I2C-bus and
-
non-I2C-bus mode
-
1.0
V
standby mode; I2C-bus mode
2.6
-
VP
V
mute condition; non-I2C-bus
2.6
-
4.5
V
mode
operating condition;
non-I2C-bus mode
[2] 6.5
-
VP
V
IEN
current on pin EN
VEN = 8.5 V
[3] -
10
70
µA
Start-up, shutdown and mute timing (see Figure 11)
twake
wake-up time
time after wake-up via EN pin
-
before ļ¬rst I2C-bus
transmission is recognized
300
500
µs
td(mute_off)
mute off delay time
I2C-bus mode with slow start
enabled and non-I2C-bus
mode; DC load detection
disabled
CSVR = 22 µF
[4] -
CSVR = 10 µF
[4] -
I2C-bus mode only; DC load
detection enabled; slow start
enabled
380
-
ms
170
-
ms
CSVR = 22 µF
[4] -
CSVR = 10 µF
[4] -
I2C-bus mode only; DC load
detection disabled; slow start
disabled
510
-
ms
250
-
ms
CSVR = 22 µF
[4] -
CSVR = 10 µF
[4] -
I2C-bus mode only; DC load
detection enabled; slow start
disabled
230
-
ms
110
-
ms
tdet(DCload)
CSVR = 22 µF
[4] -
CSVR = 10 µF
[4] -
DC load detection
I2C-bus mode only; DC load
time
detection enabled
370
-
ms
180
-
ms
td(mute-fgain)
mute to full gain delay
time
CSVR = 22 µF
CSVR = 10 µF
CSVR = 22 µF
CSVR = 10 µF
[4] -
[4] -
[5] -
[5] -
160
-
ms
70
-
ms
90
-
ms
40
-
ms
TDA1566_2
Product data sheet
Rev. 02 ā 20 August 2007
Ā© NXP B.V. 2007. All rights reserved.
22 of 46