Table 27. Summary of Bit Instructions
Clear BitCLR <dest>dest opnd ← 0
Set BitSETB <dest>dest opnd ← 1
Complement BitCPL <dest>dest opnd ← ∅ bit
AND Carry with BitANL CY, <src>(CY) ← (CY) ∧ src opnd
AND Carry with Complement of BitANL CY, /<src>(CY) ← (CY) ∧ ∅ src opnd
OR Carry with BitORL CY, <src>(CY) ← (CY) ∨ src opnd
OR Carry with Complement of BitORL CY, /<src>(CY) ← (CY) ∨ ∅ src opnd
Move Bit to CarryMOV CY, <src>(CY) ← src opnd
Move Bit from CarryMOV <dest>, CYdest opnd ← (CY)
Mnemonic
<dest>,
<src>(1)
Comments
Binary Mode
Source Mode
Bytes States Bytes States
CLR
CY
bit51
Clear carry
Clear direct bit
1
1
1
1
2
2(3)
2
2(3)
bit
Clear direct bit
4
4(3)
3
3(3)
SETB
CY
bit51
bit
Set carry
Set direct bit
Set direct bit
1
1
1
1
2
2(3)
2
2(3)
4
4(3)
3
3(3)
CY
Complement carry
1
1
1
1
CPL
bit51
Complement direct bit
2
2(3)
2
2(3)
bit
CY, bit51
CY, bit
Complement direct bit
And direct bit to carry
And direct bit to carry
4
4(3)
3
3(3)
2
1(2)
2
1(2)
4
3(2)
3
2(2)
ANL
CY, /bit51
And complemented direct bit to
carry
2
1(2)
2
1(2)
CY, /bit
And complemented direct bit to
carry
4
3(2)
3
2(2)
CY, bit51
Or direct bit to carry
2
1(2)
2
1(2)
CY, bit
Or direct bit to carry
4
3(2)
3
2(2)
ORL
CY, /bit51
Or complemented direct bit to
carry
2
1(2)
2
1(2)
CY, /bit
Or complemented direct bit to
carry
4
3(2)
3
2(2)
CY, bit51
Move direct bit to carry
2
1(2)
2
1(2)
MOV
CY, bit
bit51, CY
Move direct bit to carry
Move carry to direct bit
4
3(2)
3
2(2)
2
2(3)
2
2(3)
bit, CY
Move carry to direct bit
4
4(3)
3
3(3)
Notes:
1. A shaded cell denotes an instruction in the C51 Architecture.
2. If this instruction addresses an I/O Port (Px, x = 0-3), add 1 to the number of states.
Add 2 if it addresses a Peripheral SFR.
3. If this instruction addresses an I/O Port (Px, x = 0-3), add 2 to the number of states.
Add 3 if it addresses a Peripheral SFR.
34 AT/TSC8x251G2D
4135F–8051–11/06