4135F–8051–11/06
AT/TSC8x251G2D
Table 30. Summary of Conditional Jump Instructions (2/2)
Jump if bitJB <src>, rel(PC) ← (PC) + size (instr);
IF [src opnd = 1] THEN (PC) ← (PC) + rel
Jump if not bitJNB <src>, rel(PC) ← (PC) + size (instr);
IF [src opnd = 0] THEN (PC) ← (PC) + rel
Jump if bit and clearJBC <dest>, rel(PC) ← (PC) + size (instr);
IF [dest opnd = 1] THEN
dest opnd ← 0
(PC) ← (PC) + rel
Jump if accumulator is zeroJZ rel(PC) ← (PC) + size (instr);
IF [(A) = 0] THEN (PC) ← (PC) + rel
Jump if accumulator is not zeroJNZ rel(PC) ← (PC) + size (instr);
IF [(A) ≠ 0] THEN (PC) ← (PC) + rel
Compare and jump if not equalCJNE <src1>, <src2>, rel(PC) ← (PC) + size (instr);
IF [src opnd1 < src opnd2] THEN (CY) ← 1
IF [src opnd1 ≥ src opnd2] THEN (CY) ← 0
IF [src opnd1 ≠ src opnd2] THEN (PC) ← (PC) + rel
Decrement and jump if not zeroDJNZ <dest>, rel(PC) ← (PC) + size (instr); dest opnd ← dest opnd -1;
IF [ϕ (Z)] THEN (PC) ← (PC) + rel
Binary Mode(2) Source Mode(2)
Mnemonic <dest>, <src>(1) Comments
Bytes States Bytes States
bit51, rel
JB
bit, rel
bit51, rel
JNB
bit, rel
bit51, rel
JBC
bit, rel
Jump if direct bit is set
Jump if direct bit of 8-bit address
location is set
Jump if direct bit is not set
Jump if direct bit of 8-bit address
location is not set
Jump if direct bit is set & clear bit
Jump if direct bit of 8-bit address
location is set and clear
3
2/5(3)(6)
3
2/5(3)(6)
5
4/7(3)(6)
4
3/6(3)(6)
3
2/5(3)(6)
3
2/5(3)(6)
5
4/7(3)(6)
4
3/6(3)
3
4/7(5)(6)
3
4/7(5)(6)
5
7/10(5)(
6)
4
6/9(5)(6)
JZ
rel
Jump if ACC is zero
2
2/5(6)
2
2/5(6)
JNZ
rel
Jump if ACC is not zero
2
2/5(6)
2
2/5(6)
A, dir8, rel
Compare direct address to ACC and
jump if not equal
3
2/5(3)(6)
3
2/5(3)(6)
CJNE
A, #data, rel
Compare immediate to ACC and
jump if not equal
3
2/5(6)
3
2/5(6)
Rn, #data, rel
Compare immediate to register and
jump if not equal
3
2/5(6)
4
3/6(6)
at Ri, #data, rel
Compare immediate to indirect and
jump if not equal
3
3/6(6)
4
4/7(6)
DJNZ
Rn, rel
dir8, rel
Decrement register and jump if not
zero
Decrement direct address and jump
if not zero
2
2/5(6)
3
3/6(6)
3
3/6(4)(6)
3
3/6(4)(6)
Notes:
1. A shaded cell denotes an instruction in the C51 Architecture.
2. States are given as jump not-taken/taken.
3. If this instruction addresses an I/O Port (Px, x = 0-3), add 1 to the number of states.
Add 2 if it addresses a Peripheral SFR.
4. If this instruction addresses an I/O Port (Px, x = 0-3), add 2 to the number of states.
37