XE8802 Sensing Machine Data Acquisition MCU
with ZoomingADC™ and LCD driver
bit
RegCntOn
rw
reset
function
7
CntDExtDiv
R/W 0 nresetglobal
Divide PA(3) frequency by 2 (1=divide)
6
CntCExtDiv
R/W 0 nresetglobal
Divide PA(2) frequency by 2 (1=divide)
5
CntBExtDiv
R/W 0 nresetglobal
Divide PA(1) frequency by 2 (1=divide)
4
CntAExtDiv
R/W 0 nresetglobal
Divide PA(0) frequency by 2 (1=divide)
3
CntDEnable
R/W 0 nresetglobal
Enable counter d
2
CntCEnable
R/W 0 nresetglobal
Enable counter c
1
CntBEnable
R/W 0 nresetglobal
Enable counter b
0
CntAEnable
R/W 0 nresetglobal
Enable counter a
Table 20-9. RegCntOn
20.4 Interrupts and events map
Interrupt source
IrqA
IrqB
IrqC
IrqD
Default mapping in
the interrupt manager
RegIrqHigh(4)
RegIrqLow(5)
RegIrqHigh(3)
RegIrqLow(4)
Default mapping in the
event manager
RegEvn(7)
RegEvn(3)
RegEvn(6)
RegEvn(2)
Table 20-10. Default interrupt and event mapping.
20.5 Block schematic
ck128
ckrcext/4
ckrcext
PA(0)
PA(1)
ck1k
ck32k
PA(2)
PA(3)
© Semtech 2006
RegCntA (write)
Counter A
RegCntB (write)
Counter B
RegCntC (write)
Counter C
RegCntD (write)
Counter D
ck1k
ck16k
Capture
RegCntA (read)
RegCntB (read)
RegCntC (read)
PWM
RegCntD (read)
PB(0)
PB(1)
Figure 20-1: Counters/timers block schematic
20-4
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