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XRT75L03DIV View Datasheet(PDF) - Exar Corporation

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XRT75L03DIV Datasheet PDF : 134 Pages
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XRT75L03D
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.0
FIGURE 22. INPUT JITTER TOLERANCE FOR DS3/STS-1
64
41
15
10
5
1 .5
0 .3
0 .1 5
0 .1
G R-253 STS-1
G R-499 Cat II
G R-499 Cat I
XRT75L03D
0 .0 1
0 .0 3
0 .3
2
JITTER FRE Q UE N CY (kHz)
20
100
6.1.2 E3 Jitter Tolerance Requirements:
ITU-T G.823 standard specifies that the clock and data recovery unit must be able to accommodate and
tolerate jitter up to certain specified limits. Figure 23 shows the tolerance curve.
FIGURE 23. INPUT JITTER TOLERANCE FOR E3
ITU -T G .823
64
XRT75L03D
10
1.5
0.3
0.1
1
10
800
JITTER FR EQ UENCY (kHz)
As shown in the Figures 22 and 23 above, in the jitter tolerance measurement, the dark line indicates the
minimum level of jitter that the E3/DS3/STS-1 compliant component must tolerate.
The Table 11 below shows the jitter amplitude versus the modulation frequency for various standards.
50

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