Z8913920FSC View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z8913920FSC

VOICE PROCESSING CONTROLLERS

Zilog 

Zilog

(B) 0F

D7 D6 D5 D4 D3 D2 D1 D0

DSP EXT3,

Bits D7-D0

Figure 58. Incoming Register from DSP EXT3

(Low Byte)

(B) 0FH [Read-Only]

Expanded Register Bank F

PCON (F) %00

D7 D6 D5 D4 D3 D2 D1 D0

Note: Reset condition is 11111110

R Always "1"

W 0 P34,P37 Standard output

1 P34,P37 Comparator output

R Always "1"

W No effect

Figure 59. Port Configuration Register (PCON)

(F) 00H [Write-Only]

P4D (FH) 02H

D7 D6 D5 D4 D3 D2 D1 D0

Data

Figure 60. Port 4 Data Register

(F) 02H [Read/Write]

P4M (FH) 03H

D7 D6 D5 D4 D3 D2 D1 D0

P40-P47 I/O Definition

0 Defines Bit as Output

1 Defines Bit as Input

Returns "FF" Upon Read

Figure 61. Port 4 Mode Register

(F) 03H [Write-Only]

Z89138/Z89139

Voice Processing Controllers

P5D (FH) 04H

D7 D6 D5 D4 D3 D2 D1 D0

1

Data

Figure 62. Port 5 Data Register

(F) 04H [Read/Write]

P5M (FH) 05H

D7 D6 D5 D4 D3 D2 D1 D0

* Default setting after Reset

P50-P57 I/O Definition

0 Defines Bit as Output

1 Defines Bit as Input*

Returns "FF" Upon Read

Figure 63. Port 5 Mode Register

(F) 05H [Write-Only]

P45M (FH) 06H

(Write only)

D7 D6 D5 D4 D3 D2 D1 D0

Port 4 Configuration Bit

0 Open-Drain

1 Push-pull

No effect

Port 5 Configuration Bit

0 Open-Drain

1 Push-pull

No effect

Figure 64. Port 4 and 5 Configuration Register

(F) 06H [Write-Only]

DS97TAD0201

PRELIMINARY

57

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