PIC16C55X
6.3 RESET
The PIC16C55X differentiates between various kinds
of RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (normal operation)
• WDT wake-up (SLEEP)
Some registers are not affected in any RESET condi-
tion; their status is unknown on POR and unchanged in
any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset, on MCLR or WDT
Reset and on MCLR Reset during SLEEP. They are not
affected by a WDT wake-up, since this is viewed as the
resumption of normal operation. TO and PD bits are set
or cleared differently in different RESET situations as
indicated in Table 6-4. These bits are used in software
to determine the nature of the RESET. See Table 6-6
for a full description of RESET states of all registers.
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 6-6.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 10-3 for pulse width
specification.
FIGURE 6-6:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
Reset
MCLR/
VPP Pin
VDD
SLEEP
WDT WDT
Module Timeout
Reset
VDD rise
detect
Power-on Reset
S
OST/PWRT
OST
10-bit Ripple-counter
OSC1/
CLKIN
Pin
On-chip(1)
RC OSC
PWRT
10-bit Ripple-counter
Chip_Reset
R
Q
Enable PWRT
Enable OST
See Table 6-3 for timeout situations.
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
1996-2013 Microchip Technology Inc.
Preliminary
DS40143E-page 35