PIC12F635/PIC16F636/639
FIGURE 11-17: SPI WRITE SEQUENCE
2
CS
TCSH
6
SCLK/
ALERT
ALERT
(output)
1
TCSSC
4 16 Clocks for Write Command, Address and Data
THI TLO
TSCCS TCS1
7
TCS0
SCLK
(input)
MSb
TSU THD
1/FSCLK
LSb
ALERT
(output)
LFDATA/RSSI/
CCLK/SDIO
LFDATA
(output)
SDI
(input)
3
LFDATA
5
(output)
MCU SPI Write Details:
1. Drive the AFE’s open collector ALERT output low.
• to ensure no false clocks occur when CS drops
2. Drop CS.
• AFE SCLK/ALERT becomes SCLK input
• LFDATA/RSSI/CCLK/SDIO becomes SDI input
3. Change LFDATA/RSSI/CCLK/SDIO connected pin to output.
• driving SPI data
4. Clock in 16-bit SPI Write sequence - command, address, data and parity bit.
• command, address, data and parity bit
5. Change LFDATA/RSSI/CCLK/SDIO connected pin to input.
6. Raise CS to complete the SPI Write.
7. Change SCLK/ALERT back to input.
© 2005 Microchip Technology Inc.
Preliminary
DS41232B-page 101