PIC16F636T-I/SL(2005) View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F636T-I/SL
(Rev.:2005)

8/14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC12F635/PIC16F636/639

4.2.4.5 RA4/T1G/OSC2/CLKOUT

Figure 4-5 shows the diagram for this pin. The RA4 pin

is configurable to function as one of the following:

• a general purpose I/O

• a TMR1 gate input

• a crystal/resonator connection

• a clock output

FIGURE 4-5:

BLOCK DIAGRAM OF RA4

Data Bus

DQ

WR

WPUDA

CK Q

RD

WPUDA

CLK(1) Modes

RAPU

WR

WDA

RD

WDA

DQ

CK Q

WR

PORTA

DQ

CK Q

WR

TRISA

DQ

CK Q

RD

TRISA

RD

PORTA

DQ

WR

IOCA

CK Q

RD

IOCA

Oscillator

Circuit

OSC1

CLKOUT

Enable

Fosc/4 1

0

CLKOUT

Enable

INTOSC/

RC/EC(2)

CLKOUT

Enable

XTAL

QD

EN

QD

Interrupt-on-

change

T1G To Timer1

EN

RD PORTA

VDD

Weak

Weak

VSS

VDD

I/O pin

VSS

Q3

Note 1:

2:

Oscillator modes are XT, HS, LP, LPTMR1 and

CLKOUT Enable.

With CLKOUT option.

4.2.4.6 RA5/T1CKI/OSC1/CLKIN

Figure 4-6 shows the diagram for this pin. The RA5 pin

is configurable to function as one of the following:

• a general purpose I/O

• a TMR1 clock input

• a crystal/resonator connection

• a clock input

FIGURE 4-6:

BLOCK DIAGRAM OF RA5

Data Bus

DQ

WR

WPUDA

CK Q

RD

WPUDA

WR

WDA

DQ

CK Q

CLK(1) Modes

RAPU

VDD

Weak

Weak

VSS

RD

WDA

DQ

WR

PORTA

CK Q

WR

TRISA

DQ

CK Q

RD

TRISA

RD

PORTA

DQ

WR

IOCA

CK Q

RD

IOCA

Oscillator

Circuit

OSC2

VDD

INTOSC

Mode

I/O pin

VSS

(2)

QD

EN

Q3

QD

Interrupt-on-

change

EN

RD PORTA

T1G To Timer1

Note 1: Oscillator modes are XT, HS, LP and LPTMR1.

2: When using Timer1 with LP oscillator, the

Schmitt Trigger is bypassed.

© 2005 Microchip Technology Inc.

Preliminary

DS41232B-page 47

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